X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=board%2Famcc%2Fbamboo%2Fbamboo.h;h=49f200aa0b3df7c016ba1d7932632b1f76e695b4;hb=d4db3b86a5e090e21db710bedbbe3e50d4c56428;hp=1ce6366da4a8a58fe55cebcb84b4638922a462f2;hpb=f1f33de3321f6e6cf882ad7be0f5569234199aef;p=platform%2Fkernel%2Fu-boot.git

diff --git a/board/amcc/bamboo/bamboo.h b/board/amcc/bamboo/bamboo.h
index 1ce6366..49f200a 100644
--- a/board/amcc/bamboo/bamboo.h
+++ b/board/amcc/bamboo/bamboo.h
@@ -2,23 +2,7 @@
  * (C) Copyright 2005
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 /*----------------------------------------------------------------------------+
@@ -110,17 +94,6 @@
 /*----------------------------------------------------------------------------+
 | SDR Configuration registers
 +----------------------------------------------------------------------------*/
-/* Serial Device Strap Reg 0 */
-#define SDR0_SDSTP0		     0x0020
-/* Serial Device Strap Reg 1 */
-#define SDR0_SDSTP1		     0x0021
-/* Serial Device Strap Reg 2 */
-#define SDR0_SDSTP2		     SDR0_STRP2
-/* Serial Device Strap Reg 3 */
-#define SDR0_SDSTP3		     SDR0_STRP3
-
-#define sdr_pstrp0		     0x0040
-
 #define	  SDR0_SDSTP1_EBC_ROM_BS_MASK  0x00006000  /* EBC Boot Size Mask */
 #define	  SDR0_SDSTP1_EBC_ROM_BS_32BIT 0x00004000    /* EBC 32 bits */
 #define	  SDR0_SDSTP1_EBC_ROM_BS_16BIT 0x00002000    /* EBC 16 Bits */
@@ -261,22 +234,9 @@
 #define	 PVR_POWERPC_440EP_PASS1    0x42221850
 #define	 PVR_POWERPC_440EP_PASS2    0x422218D3
 
-#define TRUE 1
-#define FALSE 0
-
-#define GPIO_GROUP_MAX	    2
-#define GPIO_MAX	    32
-#define GPIO_ALT1_SEL	    0x40000000	    /* GPIO_OUT value put in GPIO_TSx for the GPIO nb 0 */
-#define GPIO_ALT2_SEL	    0x80000000	    /* GPIO_OUT value put in GPIO_TSx for the GPIO nb 1 */
-#define GPIO_ALT3_SEL	    0xC0000000	    /* GPIO_OUT value put in GPIO_TSx for the GPIO nb 2 */
-#define GPIO_MASK	    0xC0000000	    /* GPIO_MASK */
-#define GPIO_IN_SEL	    0x40000000	    /* GPIO_IN value put in GPIO_ISx for the GPIO nb 0 */
-					    /* For the other GPIO number, you must shift */
-
 #define GPIO0		0
 #define GPIO1		1
 
-
 /*#define MAX_SELECTION_NB	CORE_NB */
 #define MAX_CORE_SELECT_NB	22