X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=board%2Fadvantech%2Fimx8qm_rom7720_a1%2Fspl.c;h=22ed639799208f3ad521090bb307c0e29300d6a2;hb=6cc04547cb3bbd3a3d78947f200acbae19e3c67f;hp=54f48b9ba8f9af55279217649ef221ea4cdcc8e2;hpb=60c7facfc965af6ff8ea14ee26c9d49cd2d0ec22;p=platform%2Fkernel%2Fu-boot.git diff --git a/board/advantech/imx8qm_rom7720_a1/spl.c b/board/advantech/imx8qm_rom7720_a1/spl.c index 54f48b9..22ed639 100644 --- a/board/advantech/imx8qm_rom7720_a1/spl.c +++ b/board/advantech/imx8qm_rom7720_a1/spl.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include @@ -63,7 +64,7 @@ DECLARE_GLOBAL_DATA_PTR; #define USDHC1_CD_GPIO IMX_GPIO_NR(5, 22) #define USDHC2_CD_GPIO IMX_GPIO_NR(4, 12) -static struct fsl_esdhc_cfg usdhc_cfg[CONFIG_SYS_FSL_USDHC_NUM] = { +static struct fsl_esdhc_cfg usdhc_cfg[CFG_SYS_FSL_USDHC_NUM] = { {USDHC1_BASE_ADDR, 0, 8}, {USDHC2_BASE_ADDR, 0, 4}, {USDHC3_BASE_ADDR, 0, 4}, @@ -96,7 +97,7 @@ static iomux_cfg_t usdhc2_sd[] = { SC_P_USDHC2_CD_B | MUX_MODE_ALT(3) | MUX_PAD_CTRL(ESDHC_PAD_CTRL), }; -int board_mmc_init(bd_t *bis) +int board_mmc_init(struct bd_info *bis) { int i, ret; @@ -107,7 +108,7 @@ int board_mmc_init(bd_t *bis) * mmc1 USDHC2 * mmc2 USDHC3 */ - for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { + for (i = 0; i < CFG_SYS_FSL_USDHC_NUM; i++) { switch (i) { case 0: ret = sc_pm_set_resource_power_mode(-1, SC_R_SDHC_0, SC_PM_PW_MODE_ON); @@ -171,7 +172,7 @@ int board_mmc_getcd(struct mmc *mmc) void spl_board_init(void) { -#if defined(CONFIG_SPL_SPI_SUPPORT) +#if defined(CONFIG_SPL_SPI) if (sc_rm_is_resource_owned(-1, SC_R_FSPI_0)) { if (sc_pm_set_resource_power_mode(-1, SC_R_FSPI_0, SC_PM_PW_MODE_ON)) { puts("Warning: failed to initialize FSPI0\n"); @@ -184,7 +185,7 @@ void spl_board_init(void) void spl_board_prepare_for_boot(void) { -#if defined(CONFIG_SPL_SPI_SUPPORT) +#if defined(CONFIG_SPL_SPI) if (sc_rm_is_resource_owned(-1, SC_R_FSPI_0)) { if (sc_pm_set_resource_power_mode(-1, SC_R_FSPI_0, SC_PM_PW_MODE_OFF)) { puts("Warning: failed to turn off FSPI0\n");