X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=bfd%2Fcoff-sh.c;h=23e32ec6330b0cee241d2b7cb5c92e078051a2ba;hb=ffb1a5e41d6e859f5876904d614105727b03f9a2;hp=07208674b45023b57d16c8366811ae29563599b4;hpb=2b5c217d4551d71750840b7d76fd677075512903;p=platform%2Fupstream%2Fbinutils.git diff --git a/bfd/coff-sh.c b/bfd/coff-sh.c index 0720867..23e32ec 100644 --- a/bfd/coff-sh.c +++ b/bfd/coff-sh.c @@ -1,6 +1,5 @@ /* BFD back-end for Renesas Super-H COFF binaries. - Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, - 2003, 2004, 2005, 2007, 2008 Free Software Foundation, Inc. + Copyright (C) 1993-2014 Free Software Foundation, Inc. Contributed by Cygnus Support. Written by Steve Chamberlain, . Relaxing code written by Ian Lance Taylor, . @@ -30,48 +29,31 @@ #include "coff/sh.h" #include "coff/internal.h" +#undef bfd_pe_print_pdata + #ifdef COFF_WITH_PE #include "coff/pe.h" #ifndef COFF_IMAGE_WITH_PE static bfd_boolean sh_align_load_span - PARAMS ((bfd *, asection *, bfd_byte *, - bfd_boolean (*) (bfd *, asection *, PTR, bfd_byte *, bfd_vma), - PTR, bfd_vma **, bfd_vma *, bfd_vma, bfd_vma, bfd_boolean *)); + (bfd *, asection *, bfd_byte *, + bfd_boolean (*) (bfd *, asection *, void *, bfd_byte *, bfd_vma), + void *, bfd_vma **, bfd_vma *, bfd_vma, bfd_vma, bfd_boolean *); #define _bfd_sh_align_load_span sh_align_load_span #endif -#endif -#undef bfd_pe_print_pdata -#define bfd_pe_print_pdata pe_print_ce_compressed_pdata -extern bfd_boolean pe_print_ce_compressed_pdata (bfd *, void *); +#define bfd_pe_print_pdata _bfd_pe_print_ce_compressed_pdata + +#else + +#define bfd_pe_print_pdata NULL + +#endif /* COFF_WITH_PE. */ #include "libcoff.h" /* Internal functions. */ -static bfd_reloc_status_type sh_reloc - PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **)); -static long get_symbol_value PARAMS ((asymbol *)); -static bfd_boolean sh_relax_section - PARAMS ((bfd *, asection *, struct bfd_link_info *, bfd_boolean *)); -static bfd_boolean sh_relax_delete_bytes - PARAMS ((bfd *, asection *, bfd_vma, int)); -#ifndef COFF_IMAGE_WITH_PE -static const struct sh_opcode *sh_insn_info PARAMS ((unsigned int)); -#endif -static bfd_boolean sh_align_loads - PARAMS ((bfd *, asection *, struct internal_reloc *, bfd_byte *, - bfd_boolean *)); -static bfd_boolean sh_swap_insns - PARAMS ((bfd *, asection *, PTR, bfd_byte *, bfd_vma)); -static bfd_boolean sh_relocate_section - PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *, - struct internal_reloc *, struct internal_syment *, asection **)); -static bfd_byte *sh_coff_get_relocated_section_contents - PARAMS ((bfd *, struct bfd_link_info *, struct bfd_link_order *, - bfd_byte *, bfd_boolean, asymbol **)); -static reloc_howto_type * sh_coff_reloc_type_lookup PARAMS ((bfd *, bfd_reloc_code_real_type)); #ifdef COFF_WITH_PE /* Can't build import tables with 2**4 alignment. */ @@ -90,17 +72,27 @@ static reloc_howto_type * sh_coff_reloc_type_lookup PARAMS ((bfd *, bfd_reloc_co #define COFF_LONG_FILENAMES #ifdef COFF_WITH_PE -static bfd_boolean in_reloc_p PARAMS ((bfd *, reloc_howto_type *)); /* Return TRUE if this relocation should appear in the output .reloc section. */ -static bfd_boolean in_reloc_p (abfd, howto) - bfd * abfd ATTRIBUTE_UNUSED; - reloc_howto_type * howto; + +static bfd_boolean +in_reloc_p (bfd * abfd ATTRIBUTE_UNUSED, + reloc_howto_type * howto) { return ! howto->pc_relative && howto->type != R_SH_IMAGEBASE; } #endif +static bfd_reloc_status_type +sh_reloc (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); +static bfd_boolean +sh_relocate_section (bfd *, struct bfd_link_info *, bfd *, asection *, + bfd_byte *, struct internal_reloc *, + struct internal_syment *, asection **); +static bfd_boolean +sh_align_loads (bfd *, asection *, struct internal_reloc *, + bfd_byte *, bfd_boolean *); + /* The supported relocations. There are a lot of relocations defined in coff/internal.h which we do not expect to ever see. */ static reloc_howto_type sh_coff_howtos[] = @@ -401,8 +393,7 @@ static reloc_howto_type sh_coff_howtos[] = /* Get the value of a symbol, when performing a relocation. */ static long -get_symbol_value (symbol) - asymbol *symbol; +get_symbol_value (asymbol *symbol) { bfd_vma relocation; @@ -420,16 +411,15 @@ get_symbol_value (symbol) /* Convert an rtype to howto for the COFF backend linker. Copied from coff-i386. */ #define coff_rtype_to_howto coff_sh_rtype_to_howto -static reloc_howto_type * coff_sh_rtype_to_howto PARAMS ((bfd *, asection *, struct internal_reloc *, struct coff_link_hash_entry *, struct internal_syment *, bfd_vma *)); + static reloc_howto_type * -coff_sh_rtype_to_howto (abfd, sec, rel, h, sym, addendp) - bfd * abfd ATTRIBUTE_UNUSED; - asection * sec; - struct internal_reloc * rel; - struct coff_link_hash_entry * h; - struct internal_syment * sym; - bfd_vma * addendp; +coff_sh_rtype_to_howto (bfd * abfd ATTRIBUTE_UNUSED, + asection * sec, + struct internal_reloc * rel, + struct coff_link_hash_entry * h, + struct internal_syment * sym, + bfd_vma * addendp) { reloc_howto_type * howto; @@ -502,9 +492,8 @@ static const struct shcoff_reloc_map sh_reloc_map[] = #define coff_bfd_reloc_name_lookup sh_coff_reloc_name_lookup static reloc_howto_type * -sh_coff_reloc_type_lookup (abfd, code) - bfd * abfd ATTRIBUTE_UNUSED; - bfd_reloc_code_real_type code; +sh_coff_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, + bfd_reloc_code_real_type code) { unsigned int i; @@ -512,7 +501,7 @@ sh_coff_reloc_type_lookup (abfd, code) if (sh_reloc_map[i].bfd_reloc_val == code) return &sh_coff_howtos[(int) sh_reloc_map[i].shcoff_reloc_val]; - fprintf (stderr, "SH Error: unknown reloc type %d\n", code); + (*_bfd_error_handler) (_("SH Error: unknown reloc type %d"), code); return NULL; } @@ -569,15 +558,13 @@ sh_coff_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, /* This is the howto function for the SH relocations. */ static bfd_reloc_status_type -sh_reloc (abfd, reloc_entry, symbol_in, data, input_section, output_bfd, - error_message) - bfd *abfd; - arelent *reloc_entry; - asymbol *symbol_in; - PTR data; - asection *input_section; - bfd *output_bfd; - char **error_message ATTRIBUTE_UNUSED; +sh_reloc (bfd * abfd, + arelent * reloc_entry, + asymbol * symbol_in, + void * data, + asection * input_section, + bfd * output_bfd, + char ** error_message ATTRIBUTE_UNUSED) { unsigned long insn; bfd_vma sym_value; @@ -667,6 +654,9 @@ sh_reloc (abfd, reloc_entry, symbol_in, data, input_section, output_bfd, #include "coffcode.h" +static bfd_boolean +sh_relax_delete_bytes (bfd *, asection *, bfd_vma, int); + /* This function handles relaxing on the SH. Function calls on the SH look like this: @@ -711,11 +701,10 @@ sh_reloc (abfd, reloc_entry, symbol_in, data, input_section, output_bfd, can, by swapping them with one of the adjacent instructions. */ static bfd_boolean -sh_relax_section (abfd, sec, link_info, again) - bfd *abfd; - asection *sec; - struct bfd_link_info *link_info; - bfd_boolean *again; +sh_relax_section (bfd *abfd, + asection *sec, + struct bfd_link_info *link_info, + bfd_boolean *again) { struct internal_reloc *internal_relocs; bfd_boolean have_code; @@ -732,7 +721,7 @@ sh_relax_section (abfd, sec, link_info, again) if (coff_section_data (abfd, sec) == NULL) { bfd_size_type amt = sizeof (struct coff_section_tdata); - sec->used_by_bfd = (PTR) bfd_zalloc (abfd, amt); + sec->used_by_bfd = bfd_zalloc (abfd, amt); if (sec->used_by_bfd == NULL) return FALSE; } @@ -1068,11 +1057,10 @@ sh_relax_section (abfd, sec, link_info, again) /* Delete some bytes from a section while relaxing. */ static bfd_boolean -sh_relax_delete_bytes (abfd, sec, addr, count) - bfd *abfd; - asection *sec; - bfd_vma addr; - int count; +sh_relax_delete_bytes (bfd *abfd, + asection *sec, + bfd_vma addr, + int count) { bfd_byte *contents; struct internal_reloc *irel, *irelend; @@ -1464,7 +1452,7 @@ sh_relax_delete_bytes (abfd, sec, addr, count) { struct internal_syment isym; - bfd_coff_swap_sym_in (abfd, (PTR) esym, (PTR) &isym); + bfd_coff_swap_sym_in (abfd, esym, &isym); if (isym.n_scnum == sec->target_index && (bfd_vma) isym.n_value > addr @@ -1472,7 +1460,7 @@ sh_relax_delete_bytes (abfd, sec, addr, count) { isym.n_value -= count; - bfd_coff_swap_sym_out (abfd, (PTR) &isym, (PTR) esym); + bfd_coff_swap_sym_out (abfd, &isym, esym); if (*sym_hash != NULL) { @@ -1622,24 +1610,6 @@ struct sh_opcode #define MAP(a) a, sizeof a / sizeof a[0] #ifndef COFF_IMAGE_WITH_PE -static bfd_boolean sh_insn_uses_reg - PARAMS ((unsigned int, const struct sh_opcode *, unsigned int)); -static bfd_boolean sh_insn_sets_reg - PARAMS ((unsigned int, const struct sh_opcode *, unsigned int)); -static bfd_boolean sh_insn_uses_or_sets_reg - PARAMS ((unsigned int, const struct sh_opcode *, unsigned int)); -static bfd_boolean sh_insn_uses_freg - PARAMS ((unsigned int, const struct sh_opcode *, unsigned int)); -static bfd_boolean sh_insn_sets_freg - PARAMS ((unsigned int, const struct sh_opcode *, unsigned int)); -static bfd_boolean sh_insn_uses_or_sets_freg - PARAMS ((unsigned int, const struct sh_opcode *, unsigned int)); -static bfd_boolean sh_insns_conflict - PARAMS ((unsigned int, const struct sh_opcode *, unsigned int, - const struct sh_opcode *)); -static bfd_boolean sh_load_use - PARAMS ((unsigned int, const struct sh_opcode *, unsigned int, - const struct sh_opcode *)); /* The opcode maps. */ @@ -2048,8 +2018,7 @@ static const struct sh_minor_opcode sh_dsp_opcodef[] = recognized. */ static const struct sh_opcode * -sh_insn_info (insn) - unsigned int insn; +sh_insn_info (unsigned int insn) { const struct sh_major_opcode *maj; const struct sh_minor_opcode *min, *minend; @@ -2076,27 +2045,12 @@ sh_insn_info (insn) return NULL; } -/* See whether an instruction uses or sets a general purpose register */ - -static bfd_boolean -sh_insn_uses_or_sets_reg (insn, op, reg) - unsigned int insn; - const struct sh_opcode *op; - unsigned int reg; -{ - if (sh_insn_uses_reg (insn, op, reg)) - return TRUE; - - return sh_insn_sets_reg (insn, op, reg); -} - /* See whether an instruction uses a general purpose register. */ static bfd_boolean -sh_insn_uses_reg (insn, op, reg) - unsigned int insn; - const struct sh_opcode *op; - unsigned int reg; +sh_insn_uses_reg (unsigned int insn, + const struct sh_opcode *op, + unsigned int reg) { unsigned int f; @@ -2122,10 +2076,9 @@ sh_insn_uses_reg (insn, op, reg) /* See whether an instruction sets a general purpose register. */ static bfd_boolean -sh_insn_sets_reg (insn, op, reg) - unsigned int insn; - const struct sh_opcode *op; - unsigned int reg; +sh_insn_sets_reg (unsigned int insn, + const struct sh_opcode *op, + unsigned int reg) { unsigned int f; @@ -2146,27 +2099,25 @@ sh_insn_sets_reg (insn, op, reg) return FALSE; } -/* See whether an instruction uses or sets a floating point register */ +/* See whether an instruction uses or sets a general purpose register */ static bfd_boolean -sh_insn_uses_or_sets_freg (insn, op, reg) - unsigned int insn; - const struct sh_opcode *op; - unsigned int reg; +sh_insn_uses_or_sets_reg (unsigned int insn, + const struct sh_opcode *op, + unsigned int reg) { - if (sh_insn_uses_freg (insn, op, reg)) + if (sh_insn_uses_reg (insn, op, reg)) return TRUE; - return sh_insn_sets_freg (insn, op, reg); + return sh_insn_sets_reg (insn, op, reg); } /* See whether an instruction uses a floating point register. */ static bfd_boolean -sh_insn_uses_freg (insn, op, freg) - unsigned int insn; - const struct sh_opcode *op; - unsigned int freg; +sh_insn_uses_freg (unsigned int insn, + const struct sh_opcode *op, + unsigned int freg) { unsigned int f; @@ -2197,10 +2148,9 @@ sh_insn_uses_freg (insn, op, freg) /* See whether an instruction sets a floating point register. */ static bfd_boolean -sh_insn_sets_freg (insn, op, freg) - unsigned int insn; - const struct sh_opcode *op; - unsigned int freg; +sh_insn_sets_freg (unsigned int insn, + const struct sh_opcode *op, + unsigned int freg) { unsigned int f; @@ -2222,17 +2172,29 @@ sh_insn_sets_freg (insn, op, freg) return FALSE; } +/* See whether an instruction uses or sets a floating point register */ + +static bfd_boolean +sh_insn_uses_or_sets_freg (unsigned int insn, + const struct sh_opcode *op, + unsigned int reg) +{ + if (sh_insn_uses_freg (insn, op, reg)) + return TRUE; + + return sh_insn_sets_freg (insn, op, reg); +} + /* See whether instructions I1 and I2 conflict, assuming I1 comes before I2. OP1 and OP2 are the corresponding sh_opcode structures. This should return TRUE if there is a conflict, or FALSE if the instructions can be swapped safely. */ static bfd_boolean -sh_insns_conflict (i1, op1, i2, op2) - unsigned int i1; - const struct sh_opcode *op1; - unsigned int i2; - const struct sh_opcode *op2; +sh_insns_conflict (unsigned int i1, + const struct sh_opcode *op1, + unsigned int i2, + const struct sh_opcode *op2) { unsigned int f1, f2; @@ -2294,11 +2256,10 @@ sh_insns_conflict (i1, op1, i2, op2) TRUE if I1 loads a register which I2 uses. */ static bfd_boolean -sh_load_use (i1, op1, i2, op2) - unsigned int i1; - const struct sh_opcode *op1; - unsigned int i2; - const struct sh_opcode *op2; +sh_load_use (unsigned int i1, + const struct sh_opcode *op1, + unsigned int i2, + const struct sh_opcode *op2) { unsigned int f1; @@ -2340,18 +2301,16 @@ sh_load_use (i1, op1, i2, op2) static #endif bfd_boolean -_bfd_sh_align_load_span (abfd, sec, contents, swap, relocs, - plabel, label_end, start, stop, pswapped) - bfd *abfd; - asection *sec; - bfd_byte *contents; - bfd_boolean (*swap) PARAMS ((bfd *, asection *, PTR, bfd_byte *, bfd_vma)); - PTR relocs; - bfd_vma **plabel; - bfd_vma *label_end; - bfd_vma start; - bfd_vma stop; - bfd_boolean *pswapped; +_bfd_sh_align_load_span (bfd *abfd, + asection *sec, + bfd_byte *contents, + bfd_boolean (*swap) (bfd *, asection *, void *, bfd_byte *, bfd_vma), + void * relocs, + bfd_vma **plabel, + bfd_vma *label_end, + bfd_vma start, + bfd_vma stop, + bfd_boolean *pswapped) { int dsp = (abfd->arch_info->mach == bfd_mach_sh_dsp || abfd->arch_info->mach == bfd_mach_sh3_dsp); @@ -2551,91 +2510,14 @@ _bfd_sh_align_load_span (abfd, sec, contents, swap, relocs, } #endif /* not COFF_IMAGE_WITH_PE */ -/* Look for loads and stores which we can align to four byte - boundaries. See the longer comment above sh_relax_section for why - this is desirable. This sets *PSWAPPED if some instruction was - swapped. */ - -static bfd_boolean -sh_align_loads (abfd, sec, internal_relocs, contents, pswapped) - bfd *abfd; - asection *sec; - struct internal_reloc *internal_relocs; - bfd_byte *contents; - bfd_boolean *pswapped; -{ - struct internal_reloc *irel, *irelend; - bfd_vma *labels = NULL; - bfd_vma *label, *label_end; - bfd_size_type amt; - - *pswapped = FALSE; - - irelend = internal_relocs + sec->reloc_count; - - /* Get all the addresses with labels on them. */ - amt = (bfd_size_type) sec->reloc_count * sizeof (bfd_vma); - labels = (bfd_vma *) bfd_malloc (amt); - if (labels == NULL) - goto error_return; - label_end = labels; - for (irel = internal_relocs; irel < irelend; irel++) - { - if (irel->r_type == R_SH_LABEL) - { - *label_end = irel->r_vaddr - sec->vma; - ++label_end; - } - } - - /* Note that the assembler currently always outputs relocs in - address order. If that ever changes, this code will need to sort - the label values and the relocs. */ - - label = labels; - - for (irel = internal_relocs; irel < irelend; irel++) - { - bfd_vma start, stop; - - if (irel->r_type != R_SH_CODE) - continue; - - start = irel->r_vaddr - sec->vma; - - for (irel++; irel < irelend; irel++) - if (irel->r_type == R_SH_DATA) - break; - if (irel < irelend) - stop = irel->r_vaddr - sec->vma; - else - stop = sec->size; - - if (! _bfd_sh_align_load_span (abfd, sec, contents, sh_swap_insns, - (PTR) internal_relocs, &label, - label_end, start, stop, pswapped)) - goto error_return; - } - - free (labels); - - return TRUE; - - error_return: - if (labels != NULL) - free (labels); - return FALSE; -} - /* Swap two SH instructions. */ static bfd_boolean -sh_swap_insns (abfd, sec, relocs, contents, addr) - bfd *abfd; - asection *sec; - PTR relocs; - bfd_byte *contents; - bfd_vma addr; +sh_swap_insns (bfd * abfd, + asection * sec, + void * relocs, + bfd_byte * contents, + bfd_vma addr) { struct internal_reloc *internal_relocs = (struct internal_reloc *) relocs; unsigned short i1, i2; @@ -2758,21 +2640,94 @@ sh_swap_insns (abfd, sec, relocs, contents, addr) return TRUE; } + +/* Look for loads and stores which we can align to four byte + boundaries. See the longer comment above sh_relax_section for why + this is desirable. This sets *PSWAPPED if some instruction was + swapped. */ + +static bfd_boolean +sh_align_loads (bfd *abfd, + asection *sec, + struct internal_reloc *internal_relocs, + bfd_byte *contents, + bfd_boolean *pswapped) +{ + struct internal_reloc *irel, *irelend; + bfd_vma *labels = NULL; + bfd_vma *label, *label_end; + bfd_size_type amt; + + *pswapped = FALSE; + + irelend = internal_relocs + sec->reloc_count; + + /* Get all the addresses with labels on them. */ + amt = (bfd_size_type) sec->reloc_count * sizeof (bfd_vma); + labels = (bfd_vma *) bfd_malloc (amt); + if (labels == NULL) + goto error_return; + label_end = labels; + for (irel = internal_relocs; irel < irelend; irel++) + { + if (irel->r_type == R_SH_LABEL) + { + *label_end = irel->r_vaddr - sec->vma; + ++label_end; + } + } + + /* Note that the assembler currently always outputs relocs in + address order. If that ever changes, this code will need to sort + the label values and the relocs. */ + + label = labels; + + for (irel = internal_relocs; irel < irelend; irel++) + { + bfd_vma start, stop; + + if (irel->r_type != R_SH_CODE) + continue; + + start = irel->r_vaddr - sec->vma; + + for (irel++; irel < irelend; irel++) + if (irel->r_type == R_SH_DATA) + break; + if (irel < irelend) + stop = irel->r_vaddr - sec->vma; + else + stop = sec->size; + + if (! _bfd_sh_align_load_span (abfd, sec, contents, sh_swap_insns, + internal_relocs, &label, + label_end, start, stop, pswapped)) + goto error_return; + } + + free (labels); + + return TRUE; + + error_return: + if (labels != NULL) + free (labels); + return FALSE; +} /* This is a modification of _bfd_coff_generic_relocate_section, which will handle SH relaxing. */ static bfd_boolean -sh_relocate_section (output_bfd, info, input_bfd, input_section, contents, - relocs, syms, sections) - bfd *output_bfd ATTRIBUTE_UNUSED; - struct bfd_link_info *info; - bfd *input_bfd; - asection *input_section; - bfd_byte *contents; - struct internal_reloc *relocs; - struct internal_syment *syms; - asection **sections; +sh_relocate_section (bfd *output_bfd ATTRIBUTE_UNUSED, + struct bfd_link_info *info, + bfd *input_bfd, + asection *input_section, + bfd_byte *contents, + struct internal_reloc *relocs, + struct internal_syment *syms, + asection **sections) { struct internal_reloc *rel; struct internal_reloc *relend; @@ -2936,14 +2891,12 @@ sh_relocate_section (output_bfd, info, input_bfd, input_section, contents, which uses sh_relocate_section. */ static bfd_byte * -sh_coff_get_relocated_section_contents (output_bfd, link_info, link_order, - data, relocatable, symbols) - bfd *output_bfd; - struct bfd_link_info *link_info; - struct bfd_link_order *link_order; - bfd_byte *data; - bfd_boolean relocatable; - asymbol **symbols; +sh_coff_get_relocated_section_contents (bfd *output_bfd, + struct bfd_link_info *link_info, + struct bfd_link_order *link_order, + bfd_byte *data, + bfd_boolean relocatable, + asymbol **symbols) { asection *input_section = link_order->u.indirect.section; bfd *input_bfd = input_section->owner; @@ -3000,7 +2953,7 @@ sh_coff_get_relocated_section_contents (output_bfd, link_info, link_order, esymend = esym + obj_raw_syment_count (input_bfd) * symesz; while (esym < esymend) { - bfd_coff_swap_sym_in (input_bfd, (PTR) esym, (PTR) isymp); + bfd_coff_swap_sym_in (input_bfd, esym, isymp); if (isymp->n_scnum != 0) *secpp = coff_section_from_bfd_index (input_bfd, isymp->n_scnum); @@ -3045,13 +2998,13 @@ sh_coff_get_relocated_section_contents (output_bfd, link_info, link_order, /* The target vectors. */ #ifndef TARGET_SHL_SYM -CREATE_BIG_COFF_TARGET_VEC (shcoff_vec, "coff-sh", BFD_IS_RELAXABLE, 0, '_', NULL, COFF_SWAP_TABLE) +CREATE_BIG_COFF_TARGET_VEC (sh_coff_vec, "coff-sh", BFD_IS_RELAXABLE, 0, '_', NULL, COFF_SWAP_TABLE) #endif #ifdef TARGET_SHL_SYM #define TARGET_SYM TARGET_SHL_SYM #else -#define TARGET_SYM shlcoff_vec +#define TARGET_SYM sh_coff_le_vec #endif #ifndef TARGET_SHL_NAME @@ -3067,8 +3020,7 @@ CREATE_LITTLE_COFF_TARGET_VEC (TARGET_SYM, TARGET_SHL_NAME, BFD_IS_RELAXABLE, #endif #ifndef TARGET_SHL_SYM -static const bfd_target * coff_small_object_p PARAMS ((bfd *)); -static bfd_boolean coff_small_new_section_hook PARAMS ((bfd *, asection *)); + /* Some people want versions of the SH COFF target which do not align to 16 byte boundaries. We implement that by adding a couple of new target vectors. These are just like the ones above, but they @@ -3084,8 +3036,7 @@ static bfd_boolean coff_small_new_section_hook PARAMS ((bfd *, asection *)); Otherwise we won't recognize the non default endianness. */ static const bfd_target * -coff_small_object_p (abfd) - bfd *abfd; +coff_small_object_p (bfd *abfd) { if (abfd->target_defaulted) { @@ -3098,9 +3049,7 @@ coff_small_object_p (abfd) /* Set the section alignment for the small versions. */ static bfd_boolean -coff_small_new_section_hook (abfd, section) - bfd *abfd; - asection *section; +coff_small_new_section_hook (bfd *abfd, asection *section) { if (! coff_new_section_hook (abfd, section)) return FALSE; @@ -3116,7 +3065,7 @@ coff_small_new_section_hook (abfd, section) /* This is copied from bfd_coff_std_swap_table so that we can change the default section alignment power. */ -static const bfd_coff_backend_data bfd_coff_small_swap_table = +static bfd_coff_backend_data bfd_coff_small_swap_table = { coff_swap_aux_in, coff_swap_sym_in, coff_swap_lineno_in, coff_swap_aux_out, coff_swap_sym_out, @@ -3129,11 +3078,7 @@ static const bfd_coff_backend_data bfd_coff_small_swap_table = #else FALSE, #endif -#ifdef COFF_LONG_SECTION_NAMES - TRUE, -#else - FALSE, -#endif + COFF_DEFAULT_LONG_SECTION_NAMES, 2, #ifdef COFF_FORCE_SYMBOLS_IN_STRINGS TRUE, @@ -3145,6 +3090,7 @@ static const bfd_coff_backend_data bfd_coff_small_swap_table = #else 2, #endif + 32768, coff_swap_filehdr_in, coff_swap_aouthdr_in, coff_swap_scnhdr_in, coff_swap_reloc_in, coff_bad_format_hook, coff_set_arch_mach_hook, coff_mkobject_hook, styp_to_sec_flags, coff_set_alignment_hook, @@ -3166,9 +3112,9 @@ static const bfd_coff_backend_data bfd_coff_small_swap_table = #define coff_small_get_section_contents_in_window \ coff_get_section_contents_in_window -extern const bfd_target shlcoff_small_vec; +extern const bfd_target sh_coff_small_le_vec; -const bfd_target shcoff_small_vec = +const bfd_target sh_coff_small_vec = { "coff-sh-small", /* name */ bfd_target_coff_flavour, @@ -3183,6 +3129,7 @@ const bfd_target shcoff_small_vec = '_', /* leading symbol underscore */ '/', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getb64, bfd_getb_signed_64, bfd_putb64, bfd_getb32, bfd_getb_signed_32, bfd_putb32, bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* data */ @@ -3207,12 +3154,12 @@ const bfd_target shcoff_small_vec = BFD_JUMP_TABLE_LINK (coff), BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic), - & shlcoff_small_vec, + & sh_coff_small_le_vec, - (PTR) &bfd_coff_small_swap_table + & bfd_coff_small_swap_table }; -const bfd_target shlcoff_small_vec = +const bfd_target sh_coff_small_le_vec = { "coff-shl-small", /* name */ bfd_target_coff_flavour, @@ -3227,6 +3174,7 @@ const bfd_target shlcoff_small_vec = '_', /* leading symbol underscore */ '/', /* ar_pad_char */ 15, /* ar_max_namelen */ + 0, /* match priority. */ bfd_getl64, bfd_getl_signed_64, bfd_putl64, bfd_getl32, bfd_getl_signed_32, bfd_putl32, bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */ @@ -3251,8 +3199,8 @@ const bfd_target shlcoff_small_vec = BFD_JUMP_TABLE_LINK (coff), BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic), - & shcoff_small_vec, + & sh_coff_small_vec, - (PTR) &bfd_coff_small_swap_table + & bfd_coff_small_swap_table }; #endif