X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=arch%2Fx86%2Flib%2Finit_helpers.c;h=d906b528b35b5a43f3c1e4c0d40df6d365b62797;hb=b641dd3ec8dc3f6b18d2fa945ac3ab597063d191;hp=ac85278cdf0d705c1c7aa751339d7799ad49c3ab;hpb=8b1d3d19be6918ed4488fb1157deabc6c6c42481;p=platform%2Fkernel%2Fu-boot.git

diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c
index ac85278..d906b52 100644
--- a/arch/x86/lib/init_helpers.c
+++ b/arch/x86/lib/init_helpers.c
@@ -5,30 +5,34 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <linux/errno.h>
 #include <asm/mtrr.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/* Get the top of usable RAM */
-__weak ulong board_get_usable_ram_top(ulong total_size)
-{
-	return gd->ram_size;
-}
-
 int init_cache_f_r(void)
 {
-#if (CONFIG_IS_ENABLED(X86_32BIT_INIT) || \
-     (!defined(CONFIG_SPL_BUILD) && \
-      !CONFIG_IS_ENABLED(CONFIG_X86_RUN_64BIT))) && \
-    !defined(CONFIG_HAVE_FSP)
+	bool do_mtrr = CONFIG_IS_ENABLED(X86_32BIT_INIT) ||
+		 IS_ENABLED(CONFIG_FSP_VERSION2);
 	int ret;
 
-	ret = mtrr_commit(false);
-	/* If MTRR MSR is not implemented by the processor, just ignore it */
-	if (ret && ret != -ENOSYS)
-		return ret;
-#endif
+	do_mtrr &= !IS_ENABLED(CONFIG_FSP_VERSION1) &&
+		!IS_ENABLED(CONFIG_SYS_SLIMBOOTLOADER);
+
+	if (do_mtrr) {
+		ret = mtrr_commit(false);
+		/*
+		 * If MTRR MSR is not implemented by the processor, just ignore
+		 * it
+		 */
+		if (ret && ret != -ENOSYS)
+			return ret;
+	}
+
+	if (!ll_boot_init())
+		return 0;
+
 	/* Initialise the CPU cache(s) */
 	return init_cache();
 }