X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=arch%2Fx86%2Flib%2Finit_helpers.c;h=d906b528b35b5a43f3c1e4c0d40df6d365b62797;hb=04da42770b0cc3bea8841972bfc9568299ece826;hp=be4eb12c53c0e5f12dbe3af235a10d0fdf6b9392;hpb=878cd63e02f63f245182a101807186b44e20f116;p=platform%2Fkernel%2Fu-boot.git diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c index be4eb12..d906b52 100644 --- a/arch/x86/lib/init_helpers.c +++ b/arch/x86/lib/init_helpers.c @@ -1,89 +1,38 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2011 * Graeme Russ, - * - * SPDX-License-Identifier: GPL-2.0+ */ + #include -#include -#include -#include +#include +#include +#include DECLARE_GLOBAL_DATA_PTR; -/* Get the top of usable RAM */ -__weak ulong board_get_usable_ram_top(ulong total_size) -{ - return gd->ram_size; -} - -int calculate_relocation_address(void) +int init_cache_f_r(void) { - const ulong uboot_size = (uintptr_t)&__bss_end - - (uintptr_t)&__text_start; - ulong total_size; - ulong dest_addr; - ulong fdt_size = 0; - -#if defined(CONFIG_OF_SEPARATE) && defined(CONFIG_OF_CONTROL) - if (gd->fdt_blob) - fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); -#endif - total_size = ALIGN(uboot_size, 1 << 12) + CONFIG_SYS_MALLOC_LEN + - CONFIG_SYS_STACK_SIZE + fdt_size; - - dest_addr = board_get_usable_ram_top(total_size); - /* - * NOTE: All destination address are rounded down to 16-byte - * boundary to satisfy various worst-case alignment - * requirements - */ - dest_addr &= ~15; - -#if defined(CONFIG_OF_SEPARATE) && defined(CONFIG_OF_CONTROL) - /* - * If the device tree is sitting immediate above our image then we - * must relocate it. If it is embedded in the data section, then it - * will be relocated with other data. - */ - if (gd->fdt_blob) { - dest_addr -= fdt_size; - gd->new_fdt = (void *)dest_addr; - dest_addr &= ~15; + bool do_mtrr = CONFIG_IS_ENABLED(X86_32BIT_INIT) || + IS_ENABLED(CONFIG_FSP_VERSION2); + int ret; + + do_mtrr &= !IS_ENABLED(CONFIG_FSP_VERSION1) && + !IS_ENABLED(CONFIG_SYS_SLIMBOOTLOADER); + + if (do_mtrr) { + ret = mtrr_commit(false); + /* + * If MTRR MSR is not implemented by the processor, just ignore + * it + */ + if (ret && ret != -ENOSYS) + return ret; } -#endif - /* U-Boot is below the FDT */ - dest_addr -= uboot_size; - dest_addr &= ~((1 << 12) - 1); - gd->relocaddr = dest_addr; - gd->reloc_off = dest_addr - (uintptr_t)&__text_start; - /* Stack is at the bottom, so it can grow down */ - gd->start_addr_sp = dest_addr - CONFIG_SYS_MALLOC_LEN; - - return 0; -} + if (!ll_boot_init()) + return 0; -int init_cache_f_r(void) -{ /* Initialise the CPU cache(s) */ return init_cache(); } - -bd_t bd_data; - -int init_bd_struct_r(void) -{ - gd->bd = &bd_data; - memset(gd->bd, 0, sizeof(bd_t)); - - return 0; -} - -int init_func_spi(void) -{ - puts("SPI: "); - spi_init(); - puts("ready\n"); - return 0; -}