X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=arch%2Fsh%2Finclude%2Fasm%2Fcache.h;h=0698a377595df89d71e40ce62f0c1a402a98e49f;hb=7f673c99c2d8d1aa21996c5b914f06d784b080ca;hp=b21dc4422ed21355fa717228a6a4d51b98e79227;hpb=d44a5f51288aec60c6bdb4ac939d75c24e5bf9c2;p=platform%2Fkernel%2Fu-boot.git

diff --git a/arch/sh/include/asm/cache.h b/arch/sh/include/asm/cache.h
index b21dc44..0698a37 100644
--- a/arch/sh/include/asm/cache.h
+++ b/arch/sh/include/asm/cache.h
@@ -1,7 +1,7 @@
 #ifndef __ASM_SH_CACHE_H
 #define __ASM_SH_CACHE_H
 
-#if defined(CONFIG_SH4) || defined(CONFIG_SH4A)
+#if defined(CONFIG_SH4)
 
 int cache_control(unsigned int cmd);
 
@@ -18,7 +18,7 @@ struct __large_struct { unsigned long buf[100]; };
  */
 #define ARCH_DMA_MINALIGN	32
 
-#endif /* CONFIG_SH4 || CONFIG_SH4A */
+#endif /* CONFIG_SH4 */
 
 /*
  * Use the L1 data cache line size value for the minimum DMA buffer alignment