X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=arch%2Friscv%2Finclude%2Fasm%2Fvdso%2Fprocessor.h;h=14f5d27783b85811a4f7e6e1d43c9b5ee9aca5a1;hb=3c349eacc55996a57aaca5e3754edb6b83980237;hp=789bdb8211a25604be9df9200601edc75907f806;hpb=0b1d60d6dd9e2e867cc6e4277d73ea5a7ff2d4d0;p=platform%2Fkernel%2Flinux-rpi.git

diff --git a/arch/riscv/include/asm/vdso/processor.h b/arch/riscv/include/asm/vdso/processor.h
index 789bdb8..14f5d27 100644
--- a/arch/riscv/include/asm/vdso/processor.h
+++ b/arch/riscv/include/asm/vdso/processor.h
@@ -13,11 +13,12 @@ static inline void cpu_relax(void)
 	/* In lieu of a halt instruction, induce a long-latency stall. */
 	__asm__ __volatile__ ("div %0, %0, zero" : "=r" (dummy));
 #endif
+
+#ifdef __riscv_zihintpause
 	/*
 	 * Reduce instruction retirement.
 	 * This assumes the PC changes.
 	 */
-#ifdef __riscv_zihintpause
 	__asm__ __volatile__ ("pause");
 #else
 	/* Encoding of the pause instruction */