X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=arch%2Fpowerpc%2Fcpu%2Fmpc85xx%2Ffsl_corenet_serdes.c;h=20d039f3386e5682e379d4bd736bb1954bef9f0c;hb=e71372cb6371033a762b3329d063c3735a783a76;hp=ba22f90a6f92ec1e1c1bff290a6232a183e78c54;hpb=85b8c5c4bf80025de4632ae6c9a8a606e51508a4;p=platform%2Fkernel%2Fu-boot.git diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c index ba22f90..20d039f 100644 --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c @@ -13,7 +13,7 @@ #include #include #include -#include +#include #include "fsl_corenet_serdes.h" /* @@ -76,7 +76,7 @@ static const struct { { 17, 163, FSL_SRDS_BANK_2 }, { 18, 164, FSL_SRDS_BANK_2 }, { 19, 165, FSL_SRDS_BANK_2 }, -#ifdef CONFIG_PPC_P4080 +#ifdef CONFIG_ARCH_P4080 { 20, 170, FSL_SRDS_BANK_3 }, { 21, 171, FSL_SRDS_BANK_3 }, { 22, 172, FSL_SRDS_BANK_3 }, @@ -136,6 +136,9 @@ int is_serdes_configured(enum srds_prtcl device) if (!(in_be32(&gur->rcwsr[5]) & FSL_CORENET_RCWSR5_SRDS_EN)) return 0; + if (!(serdes_prtcl_map & (1 << NONE))) + fsl_serdes_init(); + return (1 << device) & serdes_prtcl_map; } @@ -514,6 +517,8 @@ void fsl_serdes_init(void) if (getenv_f("hwconfig", buffer, sizeof(buffer)) > 0) buf = buffer; #endif + if (serdes_prtcl_map & (1 << NONE)) + return; /* Is serdes enabled at all? */ if (!(in_be32(&gur->rcwsr[5]) & FSL_CORENET_RCWSR5_SRDS_EN)) @@ -857,6 +862,9 @@ void fsl_serdes_init(void) SRDS_RSTCTL_SDPD); } #endif + + /* Set the first bit to indicate serdes has been initialized */ + serdes_prtcl_map |= (1 << NONE); } const char *serdes_clock_to_string(u32 clock)