X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=arch%2Fpowerpc%2Fcpu%2Fmpc85xx%2FKconfig;h=fcb1ce6574bae6c73c49a3752b884d380370fed7;hb=63310debc95bde86c82f340a4fc27b42d09c048d;hp=cf5513641a6c47e3aa312f0619174d139267060d;hpb=d56b4b19744c314c26dc77585a7c7a9253d1487d;p=platform%2Fkernel%2Fu-boot.git diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index cf55136..fcb1ce6 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -24,46 +24,13 @@ config TARGET_SOCRATES bool "Support socrates" select ARCH_MPC8544 -config TARGET_B4420QDS - bool "Support B4420QDS" - select ARCH_B4420 - select SUPPORT_SPL - select PHYS_64BIT - -config TARGET_B4860QDS - bool "Support B4860QDS" - select ARCH_B4860 - select BOARD_LATE_INIT if CHAIN_OF_TRUST - select SUPPORT_SPL - select PHYS_64BIT - -config TARGET_BSC9131RDB - bool "Support BSC9131RDB" - select ARCH_BSC9131 - select SUPPORT_SPL - select BOARD_EARLY_INIT_F - -config TARGET_BSC9132QDS - bool "Support BSC9132QDS" - select ARCH_BSC9132 - select BOARD_LATE_INIT if CHAIN_OF_TRUST - select SUPPORT_SPL - select BOARD_EARLY_INIT_F - -config TARGET_C29XPCIE - bool "Support C29XPCIE" - select ARCH_C29X - select BOARD_LATE_INIT if CHAIN_OF_TRUST - select SUPPORT_SPL - select SUPPORT_TPL - select PHYS_64BIT - config TARGET_P3041DS bool "Support P3041DS" select PHYS_64BIT select ARCH_P3041 select BOARD_LATE_INIT if CHAIN_OF_TRUST imply CMD_SATA + imply PANIC_HANG config TARGET_P4080DS bool "Support P4080DS" @@ -71,6 +38,7 @@ config TARGET_P4080DS select ARCH_P4080 select BOARD_LATE_INIT if CHAIN_OF_TRUST imply CMD_SATA + imply PANIC_HANG config TARGET_P5020DS bool "Support P5020DS" @@ -78,6 +46,7 @@ config TARGET_P5020DS select ARCH_P5020 select BOARD_LATE_INIT if CHAIN_OF_TRUST imply CMD_SATA + imply PANIC_HANG config TARGET_P5040DS bool "Support P5040DS" @@ -85,13 +54,7 @@ config TARGET_P5040DS select ARCH_P5040 select BOARD_LATE_INIT if CHAIN_OF_TRUST imply CMD_SATA - -config TARGET_MPC8536DS - bool "Support MPC8536DS" - select ARCH_MPC8536 -# Use DDR3 controller with DDR2 DIMMs on this board - select SYS_FSL_DDRC_GEN3 - imply CMD_SATA + imply PANIC_HANG config TARGET_MPC8541CDS bool "Support MPC8541CDS" @@ -100,6 +63,7 @@ config TARGET_MPC8541CDS config TARGET_MPC8544DS bool "Support MPC8544DS" select ARCH_MPC8544 + imply PANIC_HANG config TARGET_MPC8548CDS bool "Support MPC8548CDS" @@ -123,6 +87,7 @@ config TARGET_MPC8572DS # Use DDR3 controller with DDR2 DIMMs on this board select SYS_FSL_DDRC_GEN3 imply SCSI + imply PANIC_HANG config TARGET_P1010RDB_PA bool "Support P1010RDB_PA" @@ -132,6 +97,7 @@ config TARGET_P1010RDB_PA select SUPPORT_TPL imply CMD_EEPROM imply CMD_SATA + imply PANIC_HANG config TARGET_P1010RDB_PB bool "Support P1010RDB_PB" @@ -141,26 +107,7 @@ config TARGET_P1010RDB_PB select SUPPORT_TPL imply CMD_EEPROM imply CMD_SATA - -config TARGET_P1022DS - bool "Support P1022DS" - select ARCH_P1022 - select SUPPORT_SPL - select SUPPORT_TPL - imply CMD_SATA - -config TARGET_P1023RDB - bool "Support P1023RDB" - select ARCH_P1023 - imply CMD_EEPROM - -config TARGET_P1020MBG - bool "Support P1020MBG-PC" - select SUPPORT_SPL - select SUPPORT_TPL - select ARCH_P1020 - imply CMD_EEPROM - imply CMD_SATA + imply PANIC_HANG config TARGET_P1020RDB_PC bool "Support P1020RDB-PC" @@ -169,6 +116,7 @@ config TARGET_P1020RDB_PC select ARCH_P1020 imply CMD_EEPROM imply CMD_SATA + imply PANIC_HANG config TARGET_P1020RDB_PD bool "Support P1020RDB-PD" @@ -177,38 +125,7 @@ config TARGET_P1020RDB_PD select ARCH_P1020 imply CMD_EEPROM imply CMD_SATA - -config TARGET_P1020UTM - bool "Support P1020UTM" - select SUPPORT_SPL - select SUPPORT_TPL - select ARCH_P1020 - imply CMD_EEPROM - imply CMD_SATA - -config TARGET_P1021RDB - bool "Support P1021RDB" - select SUPPORT_SPL - select SUPPORT_TPL - select ARCH_P1021 - imply CMD_EEPROM - imply CMD_SATA - -config TARGET_P1024RDB - bool "Support P1024RDB" - select SUPPORT_SPL - select SUPPORT_TPL - select ARCH_P1024 - imply CMD_EEPROM - imply CMD_SATA - -config TARGET_P1025RDB - bool "Support P1025RDB" - select SUPPORT_SPL - select SUPPORT_TPL - select ARCH_P1025 - imply CMD_EEPROM - imply CMD_SATA + imply PANIC_HANG config TARGET_P2020RDB bool "Support P2020RDB-PC" @@ -217,10 +134,7 @@ config TARGET_P2020RDB select ARCH_P2020 imply CMD_EEPROM imply CMD_SATA - -config TARGET_P1_TWR - bool "Support p1_twr" - select ARCH_P1025 + imply SATA_SIL config TARGET_P2041RDB bool "Support P2041RDB" @@ -228,28 +142,22 @@ config TARGET_P2041RDB select BOARD_LATE_INIT if CHAIN_OF_TRUST select PHYS_64BIT imply CMD_SATA + imply FSL_SATA config TARGET_QEMU_PPCE500 bool "Support qemu-ppce500" select ARCH_QEMU_E500 select PHYS_64BIT -config TARGET_T1024QDS - bool "Support T1024QDS" - select ARCH_T1024 - select BOARD_LATE_INIT if CHAIN_OF_TRUST - select SUPPORT_SPL - select PHYS_64BIT - imply CMD_EEPROM - imply CMD_SATA - config TARGET_T1023RDB bool "Support T1023RDB" select ARCH_T1023 select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT + select FSL_DDR_INTERACTIVE imply CMD_EEPROM + imply PANIC_HANG config TARGET_T1024RDB bool "Support T1024RDB" @@ -257,15 +165,9 @@ config TARGET_T1024RDB select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT + select FSL_DDR_INTERACTIVE imply CMD_EEPROM - -config TARGET_T1040QDS - bool "Support T1040QDS" - select ARCH_T1040 - select BOARD_LATE_INIT if CHAIN_OF_TRUST - select PHYS_64BIT - imply CMD_EEPROM - imply CMD_SATA + imply PANIC_HANG config TARGET_T1040RDB bool "Support T1040RDB" @@ -274,6 +176,7 @@ config TARGET_T1040RDB select SUPPORT_SPL select PHYS_64BIT imply CMD_SATA + imply PANIC_HANG config TARGET_T1040D4RDB bool "Support T1040D4RDB" @@ -282,6 +185,7 @@ config TARGET_T1040D4RDB select SUPPORT_SPL select PHYS_64BIT imply CMD_SATA + imply PANIC_HANG config TARGET_T1042RDB bool "Support T1042RDB" @@ -298,6 +202,7 @@ config TARGET_T1042D4RDB select SUPPORT_SPL select PHYS_64BIT imply CMD_SATA + imply PANIC_HANG config TARGET_T1042RDB_PI bool "Support T1042RDB_PI" @@ -306,6 +211,7 @@ config TARGET_T1042RDB_PI select SUPPORT_SPL select PHYS_64BIT imply CMD_SATA + imply PANIC_HANG config TARGET_T2080QDS bool "Support T2080QDS" @@ -313,6 +219,8 @@ config TARGET_T2080QDS select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT + select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE + select FSL_DDR_INTERACTIVE imply CMD_SATA config TARGET_T2080RDB @@ -322,41 +230,31 @@ config TARGET_T2080RDB select SUPPORT_SPL select PHYS_64BIT imply CMD_SATA + imply PANIC_HANG config TARGET_T2081QDS bool "Support T2081QDS" select ARCH_T2081 select SUPPORT_SPL select PHYS_64BIT - -config TARGET_T4160QDS - bool "Support T4160QDS" - select ARCH_T4160 - select BOARD_LATE_INIT if CHAIN_OF_TRUST - select SUPPORT_SPL - select PHYS_64BIT - imply CMD_SATA + select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE + select FSL_DDR_INTERACTIVE config TARGET_T4160RDB bool "Support T4160RDB" select ARCH_T4160 select SUPPORT_SPL select PHYS_64BIT - -config TARGET_T4240QDS - bool "Support T4240QDS" - select ARCH_T4240 - select BOARD_LATE_INIT if CHAIN_OF_TRUST - select SUPPORT_SPL - select PHYS_64BIT - imply CMD_SATA + imply PANIC_HANG config TARGET_T4240RDB bool "Support T4240RDB" select ARCH_T4240 select SUPPORT_SPL select PHYS_64BIT + select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE imply CMD_SATA + imply PANIC_HANG config TARGET_CONTROLCENTERD bool "Support controlcenterd" @@ -364,10 +262,7 @@ config TARGET_CONTROLCENTERD config TARGET_KMP204X bool "Support kmp204x" - select ARCH_P2041 - select PHYS_64BIT - imply CMD_CRAMFS - imply FS_CRAMFS + select VENDOR_KM config TARGET_XPEDITE520X bool "Support xpedite520x" @@ -387,16 +282,19 @@ config TARGET_UCP1020 bool "Support uCP1020" select ARCH_P1020 imply CMD_SATA + imply PANIC_HANG config TARGET_CYRUS_P5020 bool "Support Varisys Cyrus P5020" select ARCH_P5020 select PHYS_64BIT + imply PANIC_HANG config TARGET_CYRUS_P5040 bool "Support Varisys Cyrus P5040" select ARCH_P5040 select PHYS_64BIT + imply PANIC_HANG endchoice @@ -424,6 +322,8 @@ config ARCH_B4420 select SYS_PPC64 select FSL_IFC imply CMD_EEPROM + imply CMD_NAND + imply CMD_REGINFO config ARCH_B4860 bool @@ -450,6 +350,8 @@ config ARCH_B4860 select SYS_PPC64 select FSL_IFC imply CMD_EEPROM + imply CMD_NAND + imply CMD_REGINFO config ARCH_BSC9131 bool @@ -464,6 +366,8 @@ config ARCH_BSC9131 select SYS_FSL_SEC_COMPAT_4 select FSL_IFC imply CMD_EEPROM + imply CMD_NAND + imply CMD_REGINFO config ARCH_BSC9132 bool @@ -475,6 +379,7 @@ config ARCH_BSC9132 select SYS_FSL_ERRATUM_ESDHC111 select SYS_FSL_ERRATUM_I2C_A004447 select SYS_FSL_ERRATUM_IFC_A002769 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE @@ -483,6 +388,9 @@ config ARCH_BSC9132 select FSL_IFC imply CMD_EEPROM imply CMD_MTDPARTS + imply CMD_NAND + imply CMD_PCI + imply CMD_REGINFO config ARCH_C29X bool @@ -490,18 +398,23 @@ config ARCH_C29X select SYS_FSL_DDR_VER_46 select SYS_FSL_ERRATUM_A005125 select SYS_FSL_ERRATUM_ESDHC111 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_6 select SYS_PPC_E500_USE_DEBUG_TLB select FSL_IFC + imply CMD_NAND + imply CMD_PCI + imply CMD_REGINFO config ARCH_MPC8536 bool select FSL_LAW select SYS_FSL_ERRATUM_A004508 select SYS_FSL_ERRATUM_A005125 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR2 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC @@ -509,7 +422,9 @@ config ARCH_MPC8536 select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB select FSL_ELBC + imply CMD_NAND imply CMD_SATA + imply CMD_REGINFO config ARCH_MPC8540 bool @@ -528,6 +443,7 @@ config ARCH_MPC8544 bool select FSL_LAW select SYS_FSL_ERRATUM_A005125 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR2 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE @@ -543,12 +459,14 @@ config ARCH_MPC8548 select SYS_FSL_ERRATUM_NMG_LBC103 select SYS_FSL_ERRATUM_NMG_ETSEC129 select SYS_FSL_ERRATUM_I2C_A004447 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR2 select SYS_FSL_HAS_DDR1 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + imply CMD_REGINFO config ARCH_MPC8555 bool @@ -566,6 +484,7 @@ config ARCH_MPC8560 config ARCH_MPC8568 bool select FSL_LAW + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR2 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE @@ -576,11 +495,13 @@ config ARCH_MPC8569 select FSL_LAW select SYS_FSL_ERRATUM_A004508 select SYS_FSL_ERRATUM_A005125 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select FSL_ELBC + imply CMD_NAND config ARCH_MPC8572 bool @@ -589,6 +510,7 @@ config ARCH_MPC8572 select SYS_FSL_ERRATUM_A005125 select SYS_FSL_ERRATUM_DDR_115 select SYS_FSL_ERRATUM_DDR111_DDR134 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR2 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC @@ -596,6 +518,7 @@ config ARCH_MPC8572 select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB select FSL_ELBC + imply CMD_NAND config ARCH_P1010 bool @@ -603,6 +526,7 @@ config ARCH_P1010 select SYS_FSL_ERRATUM_A004477 select SYS_FSL_ERRATUM_A004508 select SYS_FSL_ERRATUM_A005125 + select SYS_FSL_ERRATUM_A005275 select SYS_FSL_ERRATUM_A006261 select SYS_FSL_ERRATUM_A007075 select SYS_FSL_ERRATUM_ESDHC111 @@ -611,6 +535,7 @@ config ARCH_P1010 select SYS_FSL_ERRATUM_P1010_A003549 select SYS_FSL_ERRATUM_SEC_A003571 select SYS_FSL_ERRATUM_IFC_A003399 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE @@ -619,7 +544,11 @@ config ARCH_P1010 select FSL_IFC imply CMD_EEPROM imply CMD_MTDPARTS + imply CMD_NAND imply CMD_SATA + imply CMD_PCI + imply CMD_REGINFO + imply FSL_SATA config ARCH_P1011 bool @@ -628,6 +557,7 @@ config ARCH_P1011 select SYS_FSL_ERRATUM_A005125 select SYS_FSL_ERRATUM_ELBC_A001 select SYS_FSL_ERRATUM_ESDHC111 + select FSL_PCIE_DISABLE_ASPM select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE @@ -642,13 +572,19 @@ config ARCH_P1020 select SYS_FSL_ERRATUM_A005125 select SYS_FSL_ERRATUM_ELBC_A001 select SYS_FSL_ERRATUM_ESDHC111 + select FSL_PCIE_DISABLE_ASPM + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB select FSL_ELBC + imply CMD_NAND imply CMD_SATA + imply CMD_PCI + imply CMD_REGINFO + imply SATA_SIL config ARCH_P1021 bool @@ -657,13 +593,19 @@ config ARCH_P1021 select SYS_FSL_ERRATUM_A005125 select SYS_FSL_ERRATUM_ELBC_A001 select SYS_FSL_ERRATUM_ESDHC111 + select FSL_PCIE_DISABLE_ASPM + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB select FSL_ELBC + imply CMD_REGINFO + imply CMD_NAND imply CMD_SATA + imply CMD_REGINFO + imply SATA_SIL config ARCH_P1022 bool @@ -674,6 +616,7 @@ config ARCH_P1022 select SYS_FSL_ERRATUM_ELBC_A001 select SYS_FSL_ERRATUM_ESDHC111 select SYS_FSL_ERRATUM_SATA_A001 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE @@ -687,6 +630,7 @@ config ARCH_P1023 select SYS_FSL_ERRATUM_A004508 select SYS_FSL_ERRATUM_A005125 select SYS_FSL_ERRATUM_I2C_A004447 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE @@ -700,6 +644,8 @@ config ARCH_P1024 select SYS_FSL_ERRATUM_A005125 select SYS_FSL_ERRATUM_ELBC_A001 select SYS_FSL_ERRATUM_ESDHC111 + select FSL_PCIE_DISABLE_ASPM + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE @@ -707,7 +653,11 @@ config ARCH_P1024 select SYS_PPC_E500_USE_DEBUG_TLB select FSL_ELBC imply CMD_EEPROM + imply CMD_NAND imply CMD_SATA + imply CMD_PCI + imply CMD_REGINFO + imply SATA_SIL config ARCH_P1025 bool @@ -716,6 +666,8 @@ config ARCH_P1025 select SYS_FSL_ERRATUM_A005125 select SYS_FSL_ERRATUM_ELBC_A001 select SYS_FSL_ERRATUM_ESDHC111 + select FSL_PCIE_DISABLE_ASPM + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE @@ -723,6 +675,7 @@ config ARCH_P1025 select SYS_PPC_E500_USE_DEBUG_TLB select FSL_ELBC imply CMD_SATA + imply CMD_REGINFO config ARCH_P2020 bool @@ -732,6 +685,7 @@ config ARCH_P2020 select SYS_FSL_ERRATUM_A005125 select SYS_FSL_ERRATUM_ESDHC111 select SYS_FSL_ERRATUM_ESDHC_A001 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE @@ -739,6 +693,8 @@ config ARCH_P2020 select SYS_PPC_E500_USE_DEBUG_TLB select FSL_ELBC imply CMD_EEPROM + imply CMD_NAND + imply CMD_REGINFO config ARCH_P2041 bool @@ -746,6 +702,7 @@ config ARCH_P2041 select FSL_LAW select SYS_FSL_ERRATUM_A004510 select SYS_FSL_ERRATUM_A004849 + select SYS_FSL_ERRATUM_A005275 select SYS_FSL_ERRATUM_A006261 select SYS_FSL_ERRATUM_CPU_A003999 select SYS_FSL_ERRATUM_DDR_A003 @@ -761,6 +718,7 @@ config ARCH_P2041 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select FSL_ELBC + imply CMD_NAND config ARCH_P3041 bool @@ -769,6 +727,7 @@ config ARCH_P3041 select SYS_FSL_DDR_VER_44 select SYS_FSL_ERRATUM_A004510 select SYS_FSL_ERRATUM_A004849 + select SYS_FSL_ERRATUM_A005275 select SYS_FSL_ERRATUM_A005812 select SYS_FSL_ERRATUM_A006261 select SYS_FSL_ERRATUM_CPU_A003999 @@ -785,7 +744,10 @@ config ARCH_P3041 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select FSL_ELBC + imply CMD_NAND imply CMD_SATA + imply CMD_REGINFO + imply FSL_SATA config ARCH_P4080 bool @@ -822,6 +784,8 @@ config ARCH_P4080 select SYS_FSL_SEC_COMPAT_4 select FSL_ELBC imply CMD_SATA + imply CMD_REGINFO + imply SATA_SIL config ARCH_P5020 bool @@ -829,6 +793,7 @@ config ARCH_P5020 select FSL_LAW select SYS_FSL_DDR_VER_44 select SYS_FSL_ERRATUM_A004510 + select SYS_FSL_ERRATUM_A005275 select SYS_FSL_ERRATUM_A006261 select SYS_FSL_ERRATUM_DDR_A003 select SYS_FSL_ERRATUM_DDR_A003474 @@ -844,6 +809,8 @@ config ARCH_P5020 select SYS_PPC64 select FSL_ELBC imply CMD_SATA + imply CMD_REGINFO + imply FSL_SATA config ARCH_P5040 bool @@ -852,6 +819,7 @@ config ARCH_P5040 select SYS_FSL_DDR_VER_44 select SYS_FSL_ERRATUM_A004510 select SYS_FSL_ERRATUM_A004699 + select SYS_FSL_ERRATUM_A005275 select SYS_FSL_ERRATUM_A005812 select SYS_FSL_ERRATUM_A006261 select SYS_FSL_ERRATUM_DDR_A003 @@ -866,6 +834,8 @@ config ARCH_P5040 select SYS_PPC64 select FSL_ELBC imply CMD_SATA + imply CMD_REGINFO + imply FSL_SATA config ARCH_QEMU_E500 bool @@ -876,6 +846,7 @@ config ARCH_T1023 select FSL_LAW select SYS_FSL_DDR_VER_50 select SYS_FSL_ERRATUM_A008378 + select SYS_FSL_ERRATUM_A008109 select SYS_FSL_ERRATUM_A009663 select SYS_FSL_ERRATUM_A009942 select SYS_FSL_ERRATUM_ESDHC111 @@ -887,6 +858,8 @@ config ARCH_T1023 select SYS_FSL_SEC_COMPAT_5 select FSL_IFC imply CMD_EEPROM + imply CMD_NAND + imply CMD_REGINFO config ARCH_T1024 bool @@ -894,6 +867,7 @@ config ARCH_T1024 select FSL_LAW select SYS_FSL_DDR_VER_50 select SYS_FSL_ERRATUM_A008378 + select SYS_FSL_ERRATUM_A008109 select SYS_FSL_ERRATUM_A009663 select SYS_FSL_ERRATUM_A009942 select SYS_FSL_ERRATUM_ESDHC111 @@ -905,7 +879,9 @@ config ARCH_T1024 select SYS_FSL_SEC_COMPAT_5 select FSL_IFC imply CMD_EEPROM + imply CMD_NAND imply CMD_MTDPARTS + imply CMD_REGINFO config ARCH_T1040 bool @@ -914,6 +890,7 @@ config ARCH_T1040 select SYS_FSL_DDR_VER_50 select SYS_FSL_ERRATUM_A008044 select SYS_FSL_ERRATUM_A008378 + select SYS_FSL_ERRATUM_A008109 select SYS_FSL_ERRATUM_A009663 select SYS_FSL_ERRATUM_A009942 select SYS_FSL_ERRATUM_ESDHC111 @@ -925,7 +902,10 @@ config ARCH_T1040 select SYS_FSL_SEC_COMPAT_5 select FSL_IFC imply CMD_MTDPARTS + imply CMD_NAND imply CMD_SATA + imply CMD_REGINFO + imply FSL_SATA config ARCH_T1042 bool @@ -934,6 +914,7 @@ config ARCH_T1042 select SYS_FSL_DDR_VER_50 select SYS_FSL_ERRATUM_A008044 select SYS_FSL_ERRATUM_A008378 + select SYS_FSL_ERRATUM_A008109 select SYS_FSL_ERRATUM_A009663 select SYS_FSL_ERRATUM_A009942 select SYS_FSL_ERRATUM_ESDHC111 @@ -945,7 +926,10 @@ config ARCH_T1042 select SYS_FSL_SEC_COMPAT_5 select FSL_IFC imply CMD_MTDPARTS + imply CMD_NAND imply CMD_SATA + imply CMD_REGINFO + imply FSL_SATA config ARCH_T2080 bool @@ -959,8 +943,10 @@ config ARCH_T2080 select SYS_FSL_ERRATUM_A007212 select SYS_FSL_ERRATUM_A007815 select SYS_FSL_ERRATUM_A007907 + select SYS_FSL_ERRATUM_A008109 select SYS_FSL_ERRATUM_A009942 select SYS_FSL_ERRATUM_ESDHC111 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_QORIQ_CHASSIS2 @@ -969,6 +955,9 @@ config ARCH_T2080 select SYS_PPC64 select FSL_IFC imply CMD_SATA + imply CMD_NAND + imply CMD_REGINFO + imply FSL_SATA config ARCH_T2081 bool @@ -982,6 +971,7 @@ config ARCH_T2081 select SYS_FSL_ERRATUM_A007212 select SYS_FSL_ERRATUM_A009942 select SYS_FSL_ERRATUM_ESDHC111 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_QORIQ_CHASSIS2 @@ -989,6 +979,8 @@ config ARCH_T2081 select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 select FSL_IFC + imply CMD_NAND + imply CMD_REGINFO config ARCH_T4160 bool @@ -1011,6 +1003,9 @@ config ARCH_T4160 select SYS_PPC64 select FSL_IFC imply CMD_SATA + imply CMD_NAND + imply CMD_REGINFO + imply FSL_SATA config ARCH_T4240 bool @@ -1027,6 +1022,7 @@ config ARCH_T4240 select SYS_FSL_ERRATUM_A007798 select SYS_FSL_ERRATUM_A007815 select SYS_FSL_ERRATUM_A007907 + select SYS_FSL_ERRATUM_A008109 select SYS_FSL_ERRATUM_A009942 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC @@ -1036,6 +1032,13 @@ config ARCH_T4240 select SYS_PPC64 select FSL_IFC imply CMD_SATA + imply CMD_NAND + imply CMD_REGINFO + imply FSL_SATA + +config MPC85XX_HAVE_RESET_VECTOR + bool "Indicate reset vector at CONFIG_RESET_VECTOR_ADDRESS - 0xffc" + depends on MPC85xx config BOOKE bool @@ -1049,6 +1052,7 @@ config E500 config E500MC bool + imply CMD_PCI help Enble PowerPC E500MC core @@ -1062,8 +1066,8 @@ config FSL_LAW help Use Freescale common code for Local Access Window -config SECURE_BOOT - bool "Secure Boot" +config NXP_ESBC + bool "NXP_ESBC" help Enable Freescale Secure Boot feature. Normally selected by defconfig. If unsure, do not change. @@ -1192,6 +1196,9 @@ config SYS_FSL_ERRATUM_A005812 config SYS_FSL_ERRATUM_A005871 bool +config SYS_FSL_ERRATUM_A005275 + bool + config SYS_FSL_ERRATUM_A006261 bool @@ -1299,6 +1306,12 @@ config SYS_P4080_ERRATUM_SERDES_A001 config SYS_P4080_ERRATUM_SERDES_A005 bool +config FSL_PCIE_DISABLE_ASPM + bool + +config FSL_PCIE_RESET + bool + config SYS_FSL_QORIQ_CHASSIS1 bool @@ -1432,12 +1445,7 @@ config SYS_FSL_LBC_CLK_DIV Defines divider of platform clock(clock input to eLBC controller). -source "board/freescale/b4860qds/Kconfig" -source "board/freescale/bsc9131rdb/Kconfig" -source "board/freescale/bsc9132qds/Kconfig" -source "board/freescale/c29xpcie/Kconfig" source "board/freescale/corenet_ds/Kconfig" -source "board/freescale/mpc8536ds/Kconfig" source "board/freescale/mpc8541cds/Kconfig" source "board/freescale/mpc8544ds/Kconfig" source "board/freescale/mpc8548cds/Kconfig" @@ -1446,22 +1454,16 @@ source "board/freescale/mpc8568mds/Kconfig" source "board/freescale/mpc8569mds/Kconfig" source "board/freescale/mpc8572ds/Kconfig" source "board/freescale/p1010rdb/Kconfig" -source "board/freescale/p1022ds/Kconfig" -source "board/freescale/p1023rdb/Kconfig" source "board/freescale/p1_p2_rdb_pc/Kconfig" -source "board/freescale/p1_twr/Kconfig" source "board/freescale/p2041rdb/Kconfig" source "board/freescale/qemu-ppce500/Kconfig" -source "board/freescale/t102xqds/Kconfig" source "board/freescale/t102xrdb/Kconfig" -source "board/freescale/t1040qds/Kconfig" source "board/freescale/t104xrdb/Kconfig" source "board/freescale/t208xqds/Kconfig" source "board/freescale/t208xrdb/Kconfig" -source "board/freescale/t4qds/Kconfig" source "board/freescale/t4rdb/Kconfig" source "board/gdsys/p1022/Kconfig" -source "board/keymile/kmp204x/Kconfig" +source "board/keymile/Kconfig" source "board/sbc8548/Kconfig" source "board/socrates/Kconfig" source "board/varisys/cyrus/Kconfig"