X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=arch%2Fpowerpc%2Fcpu%2Fmpc85xx%2FKconfig;h=753d0750b2ba182c8c5e212b6c839a5a5cd35e3e;hb=47df4b5f2aa789d0e0685742397808d2a626584c;hp=31c09649946baf46b2dd5aea9c0d944a852cff0a;hpb=4f66e09bb9fbc47b73f67c3cc08ee2663e8fcdb1;p=platform%2Fkernel%2Fu-boot.git diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 31c0964..753d075 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -4,6 +4,14 @@ menu "mpc85xx CPU" config SYS_CPU default "mpc85xx" +config CMD_ERRATA + bool "Enable the 'errata' command" + depends on MPC85xx + default y + help + This enables the 'errata' command which displays a list of errata + work-arounds which are enabled for the current board. + choice prompt "Target select" optional @@ -16,73 +24,37 @@ config TARGET_SOCRATES bool "Support socrates" select ARCH_MPC8544 -config TARGET_B4420QDS - bool "Support B4420QDS" - select ARCH_B4420 - select SUPPORT_SPL - select PHYS_64BIT - -config TARGET_B4860QDS - bool "Support B4860QDS" - select ARCH_B4860 - select BOARD_LATE_INIT if CHAIN_OF_TRUST - select SUPPORT_SPL - select PHYS_64BIT - -config TARGET_BSC9131RDB - bool "Support BSC9131RDB" - select ARCH_BSC9131 - select SUPPORT_SPL - select BOARD_EARLY_INIT_F - -config TARGET_BSC9132QDS - bool "Support BSC9132QDS" - select ARCH_BSC9132 - select BOARD_LATE_INIT if CHAIN_OF_TRUST - select SUPPORT_SPL - select BOARD_EARLY_INIT_F - -config TARGET_C29XPCIE - bool "Support C29XPCIE" - select ARCH_C29X - select BOARD_LATE_INIT if CHAIN_OF_TRUST - select SUPPORT_SPL - select SUPPORT_TPL - select PHYS_64BIT - config TARGET_P3041DS bool "Support P3041DS" select PHYS_64BIT select ARCH_P3041 select BOARD_LATE_INIT if CHAIN_OF_TRUST + imply CMD_SATA + imply PANIC_HANG config TARGET_P4080DS bool "Support P4080DS" select PHYS_64BIT select ARCH_P4080 select BOARD_LATE_INIT if CHAIN_OF_TRUST + imply CMD_SATA + imply PANIC_HANG config TARGET_P5020DS bool "Support P5020DS" select PHYS_64BIT select ARCH_P5020 select BOARD_LATE_INIT if CHAIN_OF_TRUST + imply CMD_SATA + imply PANIC_HANG config TARGET_P5040DS bool "Support P5040DS" select PHYS_64BIT select ARCH_P5040 select BOARD_LATE_INIT if CHAIN_OF_TRUST - -config TARGET_MPC8536DS - bool "Support MPC8536DS" - select ARCH_MPC8536 -# Use DDR3 controller with DDR2 DIMMs on this board - select SYS_FSL_DDRC_GEN3 - -config TARGET_MPC8540ADS - bool "Support MPC8540ADS" - select ARCH_MPC8540 + imply CMD_SATA + imply PANIC_HANG config TARGET_MPC8541CDS bool "Support MPC8541CDS" @@ -91,6 +63,7 @@ config TARGET_MPC8541CDS config TARGET_MPC8544DS bool "Support MPC8544DS" select ARCH_MPC8544 + imply PANIC_HANG config TARGET_MPC8548CDS bool "Support MPC8548CDS" @@ -100,10 +73,6 @@ config TARGET_MPC8555CDS bool "Support MPC8555CDS" select ARCH_MPC8555 -config TARGET_MPC8560ADS - bool "Support MPC8560ADS" - select ARCH_MPC8560 - config TARGET_MPC8568MDS bool "Support MPC8568MDS" select ARCH_MPC8568 @@ -117,6 +86,8 @@ config TARGET_MPC8572DS select ARCH_MPC8572 # Use DDR3 controller with DDR2 DIMMs on this board select SYS_FSL_DDRC_GEN3 + imply SCSI + imply PANIC_HANG config TARGET_P1010RDB_PA bool "Support P1010RDB_PA" @@ -124,6 +95,9 @@ config TARGET_P1010RDB_PA select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select SUPPORT_TPL + imply CMD_EEPROM + imply CMD_SATA + imply PANIC_HANG config TARGET_P1010RDB_PB bool "Support P1010RDB_PB" @@ -131,93 +105,111 @@ config TARGET_P1010RDB_PB select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select SUPPORT_TPL - -config TARGET_P1022DS - bool "Support P1022DS" - select ARCH_P1022 - select SUPPORT_SPL - select SUPPORT_TPL + imply CMD_EEPROM + imply CMD_SATA + imply PANIC_HANG config TARGET_P1023RDB bool "Support P1023RDB" select ARCH_P1023 + select FSL_DDR_INTERACTIVE + imply CMD_EEPROM + imply PANIC_HANG config TARGET_P1020MBG bool "Support P1020MBG-PC" select SUPPORT_SPL select SUPPORT_TPL select ARCH_P1020 + imply CMD_EEPROM + imply CMD_SATA + imply PANIC_HANG config TARGET_P1020RDB_PC bool "Support P1020RDB-PC" select SUPPORT_SPL select SUPPORT_TPL select ARCH_P1020 + imply CMD_EEPROM + imply CMD_SATA + imply PANIC_HANG config TARGET_P1020RDB_PD bool "Support P1020RDB-PD" select SUPPORT_SPL select SUPPORT_TPL select ARCH_P1020 + imply CMD_EEPROM + imply CMD_SATA + imply PANIC_HANG config TARGET_P1020UTM bool "Support P1020UTM" select SUPPORT_SPL select SUPPORT_TPL select ARCH_P1020 + imply CMD_EEPROM + imply CMD_SATA + imply PANIC_HANG config TARGET_P1021RDB bool "Support P1021RDB" select SUPPORT_SPL select SUPPORT_TPL select ARCH_P1021 + imply CMD_EEPROM + imply CMD_SATA + imply PANIC_HANG config TARGET_P1024RDB bool "Support P1024RDB" select SUPPORT_SPL select SUPPORT_TPL select ARCH_P1024 + imply CMD_EEPROM + imply CMD_SATA + imply PANIC_HANG config TARGET_P1025RDB bool "Support P1025RDB" select SUPPORT_SPL select SUPPORT_TPL select ARCH_P1025 + imply CMD_EEPROM + imply CMD_SATA + imply SATA_SIL config TARGET_P2020RDB bool "Support P2020RDB-PC" select SUPPORT_SPL select SUPPORT_TPL select ARCH_P2020 - -config TARGET_P1_TWR - bool "Support p1_twr" - select ARCH_P1025 + imply CMD_EEPROM + imply CMD_SATA + imply SATA_SIL config TARGET_P2041RDB bool "Support P2041RDB" select ARCH_P2041 select BOARD_LATE_INIT if CHAIN_OF_TRUST select PHYS_64BIT + imply CMD_SATA + imply FSL_SATA config TARGET_QEMU_PPCE500 bool "Support qemu-ppce500" select ARCH_QEMU_E500 select PHYS_64BIT -config TARGET_T1024QDS - bool "Support T1024QDS" - select ARCH_T1024 - select BOARD_LATE_INIT if CHAIN_OF_TRUST - select SUPPORT_SPL - select PHYS_64BIT - config TARGET_T1023RDB bool "Support T1023RDB" select ARCH_T1023 select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT + select FSL_DDR_INTERACTIVE + imply CMD_EEPROM + imply PANIC_HANG config TARGET_T1024RDB bool "Support T1024RDB" @@ -225,12 +217,9 @@ config TARGET_T1024RDB select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT - -config TARGET_T1040QDS - bool "Support T1040QDS" - select ARCH_T1040 - select BOARD_LATE_INIT if CHAIN_OF_TRUST - select PHYS_64BIT + select FSL_DDR_INTERACTIVE + imply CMD_EEPROM + imply PANIC_HANG config TARGET_T1040RDB bool "Support T1040RDB" @@ -238,6 +227,8 @@ config TARGET_T1040RDB select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT + imply CMD_SATA + imply PANIC_HANG config TARGET_T1040D4RDB bool "Support T1040D4RDB" @@ -245,6 +236,8 @@ config TARGET_T1040D4RDB select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT + imply CMD_SATA + imply PANIC_HANG config TARGET_T1042RDB bool "Support T1042RDB" @@ -252,6 +245,7 @@ config TARGET_T1042RDB select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT + imply CMD_SATA config TARGET_T1042D4RDB bool "Support T1042D4RDB" @@ -259,6 +253,8 @@ config TARGET_T1042D4RDB select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT + imply CMD_SATA + imply PANIC_HANG config TARGET_T1042RDB_PI bool "Support T1042RDB_PI" @@ -266,6 +262,8 @@ config TARGET_T1042RDB_PI select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT + imply CMD_SATA + imply PANIC_HANG config TARGET_T2080QDS bool "Support T2080QDS" @@ -273,6 +271,9 @@ config TARGET_T2080QDS select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT + select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE + select FSL_DDR_INTERACTIVE + imply CMD_SATA config TARGET_T2080RDB bool "Support T2080RDB" @@ -280,38 +281,32 @@ config TARGET_T2080RDB select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT + imply CMD_SATA + imply PANIC_HANG config TARGET_T2081QDS bool "Support T2081QDS" select ARCH_T2081 select SUPPORT_SPL select PHYS_64BIT - -config TARGET_T4160QDS - bool "Support T4160QDS" - select ARCH_T4160 - select BOARD_LATE_INIT if CHAIN_OF_TRUST - select SUPPORT_SPL - select PHYS_64BIT + select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE + select FSL_DDR_INTERACTIVE config TARGET_T4160RDB bool "Support T4160RDB" select ARCH_T4160 select SUPPORT_SPL select PHYS_64BIT - -config TARGET_T4240QDS - bool "Support T4240QDS" - select ARCH_T4240 - select BOARD_LATE_INIT if CHAIN_OF_TRUST - select SUPPORT_SPL - select PHYS_64BIT + imply PANIC_HANG config TARGET_T4240RDB bool "Support T4240RDB" select ARCH_T4240 select SUPPORT_SPL select PHYS_64BIT + select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE + imply CMD_SATA + imply PANIC_HANG config TARGET_CONTROLCENTERD bool "Support controlcenterd" @@ -319,10 +314,7 @@ config TARGET_CONTROLCENTERD config TARGET_KMP204X bool "Support kmp204x" - select ARCH_P2041 - select PHYS_64BIT - imply CMD_CRAMFS - imply FS_CRAMFS + select VENDOR_KM config TARGET_XPEDITE520X bool "Support xpedite520x" @@ -341,16 +333,20 @@ config TARGET_XPEDITE550X config TARGET_UCP1020 bool "Support uCP1020" select ARCH_P1020 + imply CMD_SATA + imply PANIC_HANG config TARGET_CYRUS_P5020 bool "Support Varisys Cyrus P5020" select ARCH_P5020 select PHYS_64BIT + imply PANIC_HANG config TARGET_CYRUS_P5040 bool "Support Varisys Cyrus P5040" select ARCH_P5040 select PHYS_64BIT + imply PANIC_HANG endchoice @@ -377,6 +373,9 @@ config ARCH_B4420 select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 select FSL_IFC + imply CMD_EEPROM + imply CMD_NAND + imply CMD_REGINFO config ARCH_B4860 bool @@ -402,6 +401,9 @@ config ARCH_B4860 select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 select FSL_IFC + imply CMD_EEPROM + imply CMD_NAND + imply CMD_REGINFO config ARCH_BSC9131 bool @@ -415,6 +417,9 @@ config ARCH_BSC9131 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select FSL_IFC + imply CMD_EEPROM + imply CMD_NAND + imply CMD_REGINFO config ARCH_BSC9132 bool @@ -426,12 +431,18 @@ config ARCH_BSC9132 select SYS_FSL_ERRATUM_ESDHC111 select SYS_FSL_ERRATUM_I2C_A004447 select SYS_FSL_ERRATUM_IFC_A002769 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC_E500_USE_DEBUG_TLB select FSL_IFC + imply CMD_EEPROM + imply CMD_MTDPARTS + imply CMD_NAND + imply CMD_PCI + imply CMD_REGINFO config ARCH_C29X bool @@ -439,18 +450,23 @@ config ARCH_C29X select SYS_FSL_DDR_VER_46 select SYS_FSL_ERRATUM_A005125 select SYS_FSL_ERRATUM_ESDHC111 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_6 select SYS_PPC_E500_USE_DEBUG_TLB select FSL_IFC + imply CMD_NAND + imply CMD_PCI + imply CMD_REGINFO config ARCH_MPC8536 bool select FSL_LAW select SYS_FSL_ERRATUM_A004508 select SYS_FSL_ERRATUM_A005125 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR2 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC @@ -458,6 +474,9 @@ config ARCH_MPC8536 select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB select FSL_ELBC + imply CMD_NAND + imply CMD_SATA + imply CMD_REGINFO config ARCH_MPC8540 bool @@ -476,6 +495,7 @@ config ARCH_MPC8544 bool select FSL_LAW select SYS_FSL_ERRATUM_A005125 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR2 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE @@ -491,12 +511,14 @@ config ARCH_MPC8548 select SYS_FSL_ERRATUM_NMG_LBC103 select SYS_FSL_ERRATUM_NMG_ETSEC129 select SYS_FSL_ERRATUM_I2C_A004447 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR2 select SYS_FSL_HAS_DDR1 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + imply CMD_REGINFO config ARCH_MPC8555 bool @@ -514,6 +536,7 @@ config ARCH_MPC8560 config ARCH_MPC8568 bool select FSL_LAW + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR2 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE @@ -524,11 +547,13 @@ config ARCH_MPC8569 select FSL_LAW select SYS_FSL_ERRATUM_A004508 select SYS_FSL_ERRATUM_A005125 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select FSL_ELBC + imply CMD_NAND config ARCH_MPC8572 bool @@ -537,6 +562,7 @@ config ARCH_MPC8572 select SYS_FSL_ERRATUM_A005125 select SYS_FSL_ERRATUM_DDR_115 select SYS_FSL_ERRATUM_DDR111_DDR134 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR2 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC @@ -544,6 +570,7 @@ config ARCH_MPC8572 select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB select FSL_ELBC + imply CMD_NAND config ARCH_P1010 bool @@ -551,6 +578,7 @@ config ARCH_P1010 select SYS_FSL_ERRATUM_A004477 select SYS_FSL_ERRATUM_A004508 select SYS_FSL_ERRATUM_A005125 + select SYS_FSL_ERRATUM_A005275 select SYS_FSL_ERRATUM_A006261 select SYS_FSL_ERRATUM_A007075 select SYS_FSL_ERRATUM_ESDHC111 @@ -559,12 +587,20 @@ config ARCH_P1010 select SYS_FSL_ERRATUM_P1010_A003549 select SYS_FSL_ERRATUM_SEC_A003571 select SYS_FSL_ERRATUM_IFC_A003399 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC_E500_USE_DEBUG_TLB select FSL_IFC + imply CMD_EEPROM + imply CMD_MTDPARTS + imply CMD_NAND + imply CMD_SATA + imply CMD_PCI + imply CMD_REGINFO + imply FSL_SATA config ARCH_P1011 bool @@ -573,6 +609,7 @@ config ARCH_P1011 select SYS_FSL_ERRATUM_A005125 select SYS_FSL_ERRATUM_ELBC_A001 select SYS_FSL_ERRATUM_ESDHC111 + select FSL_PCIE_DISABLE_ASPM select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE @@ -587,12 +624,19 @@ config ARCH_P1020 select SYS_FSL_ERRATUM_A005125 select SYS_FSL_ERRATUM_ELBC_A001 select SYS_FSL_ERRATUM_ESDHC111 + select FSL_PCIE_DISABLE_ASPM + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB select FSL_ELBC + imply CMD_NAND + imply CMD_SATA + imply CMD_PCI + imply CMD_REGINFO + imply SATA_SIL config ARCH_P1021 bool @@ -601,12 +645,19 @@ config ARCH_P1021 select SYS_FSL_ERRATUM_A005125 select SYS_FSL_ERRATUM_ELBC_A001 select SYS_FSL_ERRATUM_ESDHC111 + select FSL_PCIE_DISABLE_ASPM + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB select FSL_ELBC + imply CMD_REGINFO + imply CMD_NAND + imply CMD_SATA + imply CMD_REGINFO + imply SATA_SIL config ARCH_P1022 bool @@ -617,6 +668,7 @@ config ARCH_P1022 select SYS_FSL_ERRATUM_ELBC_A001 select SYS_FSL_ERRATUM_ESDHC111 select SYS_FSL_ERRATUM_SATA_A001 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE @@ -630,6 +682,7 @@ config ARCH_P1023 select SYS_FSL_ERRATUM_A004508 select SYS_FSL_ERRATUM_A005125 select SYS_FSL_ERRATUM_I2C_A004447 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE @@ -643,12 +696,20 @@ config ARCH_P1024 select SYS_FSL_ERRATUM_A005125 select SYS_FSL_ERRATUM_ELBC_A001 select SYS_FSL_ERRATUM_ESDHC111 + select FSL_PCIE_DISABLE_ASPM + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB select FSL_ELBC + imply CMD_EEPROM + imply CMD_NAND + imply CMD_SATA + imply CMD_PCI + imply CMD_REGINFO + imply SATA_SIL config ARCH_P1025 bool @@ -657,12 +718,16 @@ config ARCH_P1025 select SYS_FSL_ERRATUM_A005125 select SYS_FSL_ERRATUM_ELBC_A001 select SYS_FSL_ERRATUM_ESDHC111 + select FSL_PCIE_DISABLE_ASPM + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB select FSL_ELBC + imply CMD_SATA + imply CMD_REGINFO config ARCH_P2020 bool @@ -672,12 +737,16 @@ config ARCH_P2020 select SYS_FSL_ERRATUM_A005125 select SYS_FSL_ERRATUM_ESDHC111 select SYS_FSL_ERRATUM_ESDHC_A001 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB select FSL_ELBC + imply CMD_EEPROM + imply CMD_NAND + imply CMD_REGINFO config ARCH_P2041 bool @@ -685,6 +754,7 @@ config ARCH_P2041 select FSL_LAW select SYS_FSL_ERRATUM_A004510 select SYS_FSL_ERRATUM_A004849 + select SYS_FSL_ERRATUM_A005275 select SYS_FSL_ERRATUM_A006261 select SYS_FSL_ERRATUM_CPU_A003999 select SYS_FSL_ERRATUM_DDR_A003 @@ -700,6 +770,7 @@ config ARCH_P2041 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select FSL_ELBC + imply CMD_NAND config ARCH_P3041 bool @@ -708,6 +779,7 @@ config ARCH_P3041 select SYS_FSL_DDR_VER_44 select SYS_FSL_ERRATUM_A004510 select SYS_FSL_ERRATUM_A004849 + select SYS_FSL_ERRATUM_A005275 select SYS_FSL_ERRATUM_A005812 select SYS_FSL_ERRATUM_A006261 select SYS_FSL_ERRATUM_CPU_A003999 @@ -724,6 +796,10 @@ config ARCH_P3041 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select FSL_ELBC + imply CMD_NAND + imply CMD_SATA + imply CMD_REGINFO + imply FSL_SATA config ARCH_P4080 bool @@ -759,6 +835,9 @@ config ARCH_P4080 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select FSL_ELBC + imply CMD_SATA + imply CMD_REGINFO + imply SATA_SIL config ARCH_P5020 bool @@ -766,6 +845,7 @@ config ARCH_P5020 select FSL_LAW select SYS_FSL_DDR_VER_44 select SYS_FSL_ERRATUM_A004510 + select SYS_FSL_ERRATUM_A005275 select SYS_FSL_ERRATUM_A006261 select SYS_FSL_ERRATUM_DDR_A003 select SYS_FSL_ERRATUM_DDR_A003474 @@ -780,6 +860,9 @@ config ARCH_P5020 select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 select FSL_ELBC + imply CMD_SATA + imply CMD_REGINFO + imply FSL_SATA config ARCH_P5040 bool @@ -788,6 +871,7 @@ config ARCH_P5040 select SYS_FSL_DDR_VER_44 select SYS_FSL_ERRATUM_A004510 select SYS_FSL_ERRATUM_A004699 + select SYS_FSL_ERRATUM_A005275 select SYS_FSL_ERRATUM_A005812 select SYS_FSL_ERRATUM_A006261 select SYS_FSL_ERRATUM_DDR_A003 @@ -801,6 +885,9 @@ config ARCH_P5040 select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 select FSL_ELBC + imply CMD_SATA + imply CMD_REGINFO + imply FSL_SATA config ARCH_QEMU_E500 bool @@ -811,6 +898,7 @@ config ARCH_T1023 select FSL_LAW select SYS_FSL_DDR_VER_50 select SYS_FSL_ERRATUM_A008378 + select SYS_FSL_ERRATUM_A008109 select SYS_FSL_ERRATUM_A009663 select SYS_FSL_ERRATUM_A009942 select SYS_FSL_ERRATUM_ESDHC111 @@ -821,6 +909,9 @@ config ARCH_T1023 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 select FSL_IFC + imply CMD_EEPROM + imply CMD_NAND + imply CMD_REGINFO config ARCH_T1024 bool @@ -828,6 +919,7 @@ config ARCH_T1024 select FSL_LAW select SYS_FSL_DDR_VER_50 select SYS_FSL_ERRATUM_A008378 + select SYS_FSL_ERRATUM_A008109 select SYS_FSL_ERRATUM_A009663 select SYS_FSL_ERRATUM_A009942 select SYS_FSL_ERRATUM_ESDHC111 @@ -838,6 +930,10 @@ config ARCH_T1024 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 select FSL_IFC + imply CMD_EEPROM + imply CMD_NAND + imply CMD_MTDPARTS + imply CMD_REGINFO config ARCH_T1040 bool @@ -846,6 +942,7 @@ config ARCH_T1040 select SYS_FSL_DDR_VER_50 select SYS_FSL_ERRATUM_A008044 select SYS_FSL_ERRATUM_A008378 + select SYS_FSL_ERRATUM_A008109 select SYS_FSL_ERRATUM_A009663 select SYS_FSL_ERRATUM_A009942 select SYS_FSL_ERRATUM_ESDHC111 @@ -856,6 +953,11 @@ config ARCH_T1040 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 select FSL_IFC + imply CMD_MTDPARTS + imply CMD_NAND + imply CMD_SATA + imply CMD_REGINFO + imply FSL_SATA config ARCH_T1042 bool @@ -864,6 +966,7 @@ config ARCH_T1042 select SYS_FSL_DDR_VER_50 select SYS_FSL_ERRATUM_A008044 select SYS_FSL_ERRATUM_A008378 + select SYS_FSL_ERRATUM_A008109 select SYS_FSL_ERRATUM_A009663 select SYS_FSL_ERRATUM_A009942 select SYS_FSL_ERRATUM_ESDHC111 @@ -874,6 +977,11 @@ config ARCH_T1042 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 select FSL_IFC + imply CMD_MTDPARTS + imply CMD_NAND + imply CMD_SATA + imply CMD_REGINFO + imply FSL_SATA config ARCH_T2080 bool @@ -887,8 +995,10 @@ config ARCH_T2080 select SYS_FSL_ERRATUM_A007212 select SYS_FSL_ERRATUM_A007815 select SYS_FSL_ERRATUM_A007907 + select SYS_FSL_ERRATUM_A008109 select SYS_FSL_ERRATUM_A009942 select SYS_FSL_ERRATUM_ESDHC111 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_QORIQ_CHASSIS2 @@ -896,6 +1006,10 @@ config ARCH_T2080 select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 select FSL_IFC + imply CMD_SATA + imply CMD_NAND + imply CMD_REGINFO + imply FSL_SATA config ARCH_T2081 bool @@ -909,6 +1023,7 @@ config ARCH_T2081 select SYS_FSL_ERRATUM_A007212 select SYS_FSL_ERRATUM_A009942 select SYS_FSL_ERRATUM_ESDHC111 + select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_QORIQ_CHASSIS2 @@ -916,6 +1031,8 @@ config ARCH_T2081 select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 select FSL_IFC + imply CMD_NAND + imply CMD_REGINFO config ARCH_T4160 bool @@ -937,6 +1054,10 @@ config ARCH_T4160 select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 select FSL_IFC + imply CMD_SATA + imply CMD_NAND + imply CMD_REGINFO + imply FSL_SATA config ARCH_T4240 bool @@ -953,6 +1074,7 @@ config ARCH_T4240 select SYS_FSL_ERRATUM_A007798 select SYS_FSL_ERRATUM_A007815 select SYS_FSL_ERRATUM_A007907 + select SYS_FSL_ERRATUM_A008109 select SYS_FSL_ERRATUM_A009942 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC @@ -961,6 +1083,14 @@ config ARCH_T4240 select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 select FSL_IFC + imply CMD_SATA + imply CMD_NAND + imply CMD_REGINFO + imply FSL_SATA + +config MPC85XX_HAVE_RESET_VECTOR + bool "Indicate reset vector at CONFIG_RESET_VECTOR_ADDRESS - 0xffc" + depends on MPC85xx config BOOKE bool @@ -974,6 +1104,7 @@ config E500 config E500MC bool + imply CMD_PCI help Enble PowerPC E500MC core @@ -987,8 +1118,8 @@ config FSL_LAW help Use Freescale common code for Local Access Window -config SECURE_BOOT - bool "Secure Boot" +config NXP_ESBC + bool "NXP_ESBC" help Enable Freescale Secure Boot feature. Normally selected by defconfig. If unsure, do not change. @@ -1117,6 +1248,9 @@ config SYS_FSL_ERRATUM_A005812 config SYS_FSL_ERRATUM_A005871 bool +config SYS_FSL_ERRATUM_A005275 + bool + config SYS_FSL_ERRATUM_A006261 bool @@ -1224,6 +1358,12 @@ config SYS_P4080_ERRATUM_SERDES_A001 config SYS_P4080_ERRATUM_SERDES_A005 bool +config FSL_PCIE_DISABLE_ASPM + bool + +config FSL_PCIE_RESET + bool + config SYS_FSL_QORIQ_CHASSIS1 bool @@ -1357,38 +1497,26 @@ config SYS_FSL_LBC_CLK_DIV Defines divider of platform clock(clock input to eLBC controller). -source "board/freescale/b4860qds/Kconfig" -source "board/freescale/bsc9131rdb/Kconfig" -source "board/freescale/bsc9132qds/Kconfig" -source "board/freescale/c29xpcie/Kconfig" source "board/freescale/corenet_ds/Kconfig" -source "board/freescale/mpc8536ds/Kconfig" -source "board/freescale/mpc8540ads/Kconfig" source "board/freescale/mpc8541cds/Kconfig" source "board/freescale/mpc8544ds/Kconfig" source "board/freescale/mpc8548cds/Kconfig" source "board/freescale/mpc8555cds/Kconfig" -source "board/freescale/mpc8560ads/Kconfig" source "board/freescale/mpc8568mds/Kconfig" source "board/freescale/mpc8569mds/Kconfig" source "board/freescale/mpc8572ds/Kconfig" source "board/freescale/p1010rdb/Kconfig" -source "board/freescale/p1022ds/Kconfig" source "board/freescale/p1023rdb/Kconfig" source "board/freescale/p1_p2_rdb_pc/Kconfig" -source "board/freescale/p1_twr/Kconfig" source "board/freescale/p2041rdb/Kconfig" source "board/freescale/qemu-ppce500/Kconfig" -source "board/freescale/t102xqds/Kconfig" source "board/freescale/t102xrdb/Kconfig" -source "board/freescale/t1040qds/Kconfig" source "board/freescale/t104xrdb/Kconfig" source "board/freescale/t208xqds/Kconfig" source "board/freescale/t208xrdb/Kconfig" -source "board/freescale/t4qds/Kconfig" source "board/freescale/t4rdb/Kconfig" source "board/gdsys/p1022/Kconfig" -source "board/keymile/kmp204x/Kconfig" +source "board/keymile/Kconfig" source "board/sbc8548/Kconfig" source "board/socrates/Kconfig" source "board/varisys/cyrus/Kconfig"