X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=arch%2Fmips%2FKconfig;h=48e754cc46cec922bd13aa7f1e3ab5714765b278;hb=04da42770b0cc3bea8841972bfc9568299ece826;hp=10b55c914e689718522199aefee79ea2b525434d;hpb=4c835a607bd5adf88a726c0f636b00dd31e50237;p=platform%2Fkernel%2Fu-boot.git diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 10b55c9..48e754c 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -59,6 +59,11 @@ config ARCH_ATH79 select OF_CONTROL imply CMD_DM +config ARCH_MSCC + bool "Support MSCC VCore-III" + select OF_CONTROL + select DM + config ARCH_BMIPS bool "Support BMIPS SoCs" select CLK @@ -69,20 +74,37 @@ config ARCH_BMIPS select SYSRESET imply CMD_DM -config ARCH_MT7620 - bool "Support MT7620/7688 SoCs" +config ARCH_MTMIPS + bool "Support MediaTek MIPS platforms" + select CLK imply CMD_DM select DISPLAY_CPUINFO select DM + imply DM_ETH + imply DM_GPIO + select DM_RESET select DM_SERIAL + select PINCTRL + select PINMUX + select PINCONF + select RESET_MTMIPS imply DM_SPI imply DM_SPI_FLASH + select LAST_STAGE_INIT select MIPS_TUNE_24KC select OF_CONTROL select ROM_EXCEPTION_VECTORS select SUPPORTS_CPU_MIPS32_R1 select SUPPORTS_CPU_MIPS32_R2 select SUPPORTS_LITTLE_ENDIAN + select SYSRESET + select SUPPORT_SPL + +config ARCH_JZ47XX + bool "Support Ingenic JZ47xx" + select SUPPORT_SPL + select OF_CONTROL + select DM config MACH_PIC32 bool "Support Microchip PIC32" @@ -131,12 +153,13 @@ endchoice source "board/imgtec/boston/Kconfig" source "board/imgtec/malta/Kconfig" source "board/imgtec/xilfpga/Kconfig" -source "board/micronas/vct/Kconfig" source "board/qemu-mips/Kconfig" source "arch/mips/mach-ath79/Kconfig" +source "arch/mips/mach-mscc/Kconfig" source "arch/mips/mach-bmips/Kconfig" +source "arch/mips/mach-jz47xx/Kconfig" source "arch/mips/mach-pic32/Kconfig" -source "arch/mips/mach-mt7620/Kconfig" +source "arch/mips/mach-mtmips/Kconfig" if MIPS @@ -247,6 +270,78 @@ config MIPS_CACHE_INDEX_BASE Normally this is CKSEG0. If the MIPS system needs to move this block to some SRAM or ScratchPad RAM, adapt this option accordingly. +config MIPS_RELOCATION_TABLE_SIZE + hex "Relocation table size" + range 0x100 0x10000 + default "0x8000" + ---help--- + A table of relocation data will be appended to the U-Boot binary + and parsed in relocate_code() to fix up all offsets in the relocated + U-Boot. + + This option allows the amount of space reserved for the table to be + adjusted in a range from 256 up to 64k. The default is 32k and should + be ok in most cases. Reduce this value to shrink the size of U-Boot + binary. + + The build will fail and a valid size suggested if this is too small. + + If unsure, leave at the default value. + +config RESTORE_EXCEPTION_VECTOR_BASE + bool "Restore exception vector base before booting linux kernel" + default n + help + In U-Boot the exception vector base will be moved to top of memory, + to be used to display register dump when exception occurs. + But some old linux kernel does not honor the base set in CP0_EBASE. + A modified exception vector base will cause kernel crash. + + This option will restore the exception vector base to its previous + value. + + If unsure, say N. + +config OVERRIDE_EXCEPTION_VECTOR_BASE + bool "Override the exception vector base to be restored" + depends on RESTORE_EXCEPTION_VECTOR_BASE + default n + help + Enable this option if you want to use a different exception vector + base rather than the previously saved one. + +config NEW_EXCEPTION_VECTOR_BASE + hex "New exception vector base" + depends on OVERRIDE_EXCEPTION_VECTOR_BASE + range 0x80000000 0xbffff000 + default 0x80000000 + help + The exception vector base to be restored before booting linux kernel + +config INIT_STACK_WITHOUT_MALLOC_F + bool "Do not reserve malloc space on initial stack" + default n + help + Enable this option if you don't want to reserve malloc space on + initial stack. This is useful if the initial stack can't hold large + malloc space. Platform should set the malloc_base later when DRAM is + ready to use. + +config SPL_INIT_STACK_WITHOUT_MALLOC_F + bool "Do not reserve malloc space on initial stack in SPL" + default n + help + Enable this option if you don't want to reserve malloc space on + initial stack. This is useful if the initial stack can't hold large + malloc space. Platform should set the malloc_base later when DRAM is + ready to use. + +config SPL_LOADER_SUPPORT + bool + default n + help + Enable this option if you want to use SPL loaders without DM enabled. + endmenu menu "OS boot interface" @@ -349,6 +444,15 @@ config MIPS_INIT_STACK_IN_SRAM lowlevel_init. Thus lowlevel_init does not need to be implemented in assembler. +config MIPS_SRAM_INIT + bool + default n + depends on MIPS_INIT_STACK_IN_SRAM + help + Select this if the SRAM for initial stack needs to be initialized + before it can be used. If enabled, a function mips_sram_init() will + be called just before setup_stack_gd. + config SYS_DCACHE_SIZE int default 0 @@ -373,9 +477,17 @@ config SYS_ICACHE_LINE_SIZE help The size of L1 Icache lines, if known at compile time. +config SYS_SCACHE_LINE_SIZE + int + default 0 + help + The size of L2 cache lines, if known at compile time. + + config SYS_CACHE_SIZE_AUTO def_bool y if SYS_DCACHE_SIZE = 0 && SYS_ICACHE_SIZE = 0 && \ - SYS_DCACHE_LINE_SIZE = 0 && SYS_ICACHE_LINE_SIZE = 0 + SYS_DCACHE_LINE_SIZE = 0 && SYS_ICACHE_LINE_SIZE = 0 && \ + SYS_SCACHE_LINE_SIZE = 0 help Select this (or let it be auto-selected by not defining any cache sizes) in order to allow U-Boot to automatically detect the sizes