X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=arch%2Fmicroblaze%2Fcpu%2Fstart.S;h=1757bbfa94b9df4950bcf826bc66b22a243ad9da;hb=1ad6364eeb4f578e423081d1748e8a3fdf1ab01d;hp=8564c4e30ab5e70c6d1008c1cfcd3c8f14dfca9a;hpb=8f082d78fafd94db3f21b503794e0875d3331e53;p=platform%2Fkernel%2Fu-boot.git diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 8564c4e..1757bbf 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -5,23 +5,7 @@ * Michal SIMEK * Yasushi SHOJI * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #include @@ -38,6 +22,11 @@ _start: */ mts rmsr, r0 /* disable cache */ + +#if defined(CONFIG_SPL_BUILD) + addi r1, r0, CONFIG_SPL_STACK_ADDR + addi r1, r1, -4 /* Decrement SP to top of memory */ +#else addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET addi r1, r1, -4 /* Decrement SP to top of memory */ @@ -131,6 +120,13 @@ _start: sh r7, r0, r8 rsubi r8, r10, 0x26 sh r6, r0, r8 +#endif /* BUILD_SPL */ + + /* Flush cache before enable cache */ + addik r5, r0, 0 + addik r6, r0, XILINX_DCACHE_BYTE_SIZE +flush: bralid r15, flush_cache + nop /* enable instruction and data cache */ mfs r12, rmsr @@ -149,9 +145,14 @@ clear_bss: cmp r6, r5, r4 /* check if we have reach the end */ bnei r6, 2b 3: /* jumping to board_init */ +#ifndef CONFIG_SPL_BUILD brai board_init_f +#else + brai board_init_r +#endif 1: bri 1b +#ifndef CONFIG_SPL_BUILD /* * Read 16bit little endian */ @@ -184,3 +185,4 @@ out16: bslli r3, r6, 8 rtsd r15, 8 or r0, r0, r0 .end out16 +#endif