X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=arch%2Farm%2Fmach-mvebu%2Finclude%2Fmach%2Fcpu.h;h=5e8bf0c4ce0311704201ca942ee67b9d8514df41;hb=944c7a317675d8dbf082a2f144fec1139a5cb811;hp=297ac5266dc9bff1912db7f2403df137614a1316;hpb=250eea74b98fb36c6bd7bebfa5ba9980b9347340;p=platform%2Fkernel%2Fu-boot.git

diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h
index 297ac52..5e8bf0c 100644
--- a/arch/arm/mach-mvebu/include/mach/cpu.h
+++ b/arch/arm/mach-mvebu/include/mach/cpu.h
@@ -56,13 +56,23 @@ enum cpu_attrib {
 	CPU_ATTR_DEV_CS3 = 0x37,
 };
 
+enum {
+	MVEBU_SOC_AXP,
+	MVEBU_SOC_A38X,
+	MVEBU_SOC_UNKNOWN,
+};
+
 /*
  * Default Device Address MAP BAR values
  */
-#define DEFADR_PCI_MEM		0x90000000
-#define DEFADR_PCI_IO		0xC0000000
-#define DEFADR_SPIF		0xF4000000
-#define DEFADR_BOOTROM		0xF8000000
+#define MBUS_PCI_MEM_BASE	0xE8000000
+#define MBUS_PCI_MEM_SIZE	(128 << 20)
+#define MBUS_PCI_IO_BASE	0xF1100000
+#define MBUS_PCI_IO_SIZE	(64 << 10)
+#define MBUS_SPI_BASE		0xF4000000
+#define MBUS_SPI_SIZE		(8 << 20)
+#define MBUS_BOOTROM_BASE	0xF8000000
+#define MBUS_BOOTROM_SIZE	(8 << 20)
 
 struct mbus_win {
 	u32 base;
@@ -106,6 +116,12 @@ unsigned int mvebu_sdram_bar(enum memory_bank bank);
 unsigned int mvebu_sdram_bs(enum memory_bank bank);
 void mvebu_sdram_size_adjust(enum memory_bank bank);
 int mvebu_mbus_probe(struct mbus_win windows[], int count);
+int mvebu_soc_family(void);
+u32 mvebu_get_nand_clock(void);
+
+void return_to_bootrom(void);
+
+int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks);
 
 /*
  * Highspeed SERDES PHY config init, ported from bin_hdr
@@ -116,7 +132,7 @@ int serdes_phy_config(void);
 /*
  * DDR3 init / training code ported from Marvell bin_hdr. Now
  * available in mainline U-Boot in:
- * drivers/ddr/mvebu/
+ * drivers/ddr/marvell
  */
 int ddr3_init(void);
 #endif /* __ASSEMBLY__ */