X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=arch%2Farm%2Flib%2Frelocate_64.S;h=171d094c334f9654b1feb6a0b7bfe33368360e68;hb=83d290c56fab2d38cd1ab4c4cc7099559c1d5046;hp=5c51cae8ab0b126fb8c391919a51e880e031e08e;hpb=519fdde9e6a6ebce7dc743b4f5621503d25b7a45;p=platform%2Fkernel%2Fu-boot.git diff --git a/arch/arm/lib/relocate_64.S b/arch/arm/lib/relocate_64.S index 5c51cae..171d094 100644 --- a/arch/arm/lib/relocate_64.S +++ b/arch/arm/lib/relocate_64.S @@ -1,15 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * relocate - common relocation function for AArch64 U-Boot * * (C) Copyright 2013 * Albert ARIBAUD * David Feng - * - * SPDX-License-Identifier: GPL-2.0+ */ #include #include +#include #include #include @@ -26,11 +26,24 @@ ENTRY(relocate_code) /* * Copy u-boot from flash to RAM */ - ldr x1, =__image_copy_start /* x1 <- SRC &__image_copy_start */ - subs x9, x0, x1 /* x9 <- relocation offset */ + adr x1, __image_copy_start /* x1 <- Run &__image_copy_start */ + subs x9, x0, x1 /* x8 <- Run to copy offset */ b.eq relocate_done /* skip relocation */ - ldr x2, =__image_copy_end /* x2 <- SRC &__image_copy_end */ + /* + * Don't ldr x1, __image_copy_start here, since if the code is already + * running at an address other than it was linked to, that instruction + * will load the relocated value of __image_copy_start. To + * correctly apply relocations, we need to know the linked value. + * + * Linked &__image_copy_start, which we know was at + * CONFIG_SYS_TEXT_BASE, which is stored in _TEXT_BASE, as a non- + * relocated value, since it isn't a symbol reference. + */ + ldr x1, _TEXT_BASE /* x1 <- Linked &__image_copy_start */ + subs x9, x0, x1 /* x9 <- Link to copy offset */ + adr x1, __image_copy_start /* x1 <- Run &__image_copy_start */ + adr x2, __image_copy_end /* x2 <- Run &__image_copy_end */ copy_loop: ldp x10, x11, [x1], #16 /* copy from source address [x1] */ stp x10, x11, [x0], #16 /* copy to target address [x0] */ @@ -41,13 +54,13 @@ copy_loop: /* * Fix .rela.dyn relocations */ - ldr x2, =__rel_dyn_start /* x2 <- SRC &__rel_dyn_start */ - ldr x3, =__rel_dyn_end /* x3 <- SRC &__rel_dyn_end */ + adr x2, __rel_dyn_start /* x2 <- Run &__rel_dyn_start */ + adr x3, __rel_dyn_end /* x3 <- Run &__rel_dyn_end */ fixloop: ldp x0, x1, [x2], #16 /* (x0,x1) <- (SRC location, fixup) */ ldr x4, [x2], #8 /* x4 <- addend */ and x1, x1, #0xffffffff - cmp x1, #1027 /* relative fixup? */ + cmp x1, #R_AARCH64_RELATIVE bne fixnext /* relative fix: store addend plus offset at dest location */ @@ -67,11 +80,11 @@ relocate_done: b 0f 1: mrs x0, sctlr_el1 0: tbz w0, #2, 5f /* skip flushing cache if disabled */ - tbz w0, #12, 4f /* invalide i-cache is enabled */ + tbz w0, #12, 4f /* skip invalidating i-cache if disabled */ ic iallu /* i-cache invalidate all */ isb sy 4: ldp x0, x1, [sp, #16] bl __asm_flush_dcache_range -5: ldp x29, x30, [sp],#16 +5: ldp x29, x30, [sp],#32 ret ENDPROC(relocate_code)