X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=arch%2Farm%2Finclude%2Fasm%2Fomap_common.h;h=323952f5f1b4f5e77f83d4c2a49190ce1d5a5ec0;hb=98d2d5e8c473232dc718763dbec284b7349dcc05;hp=61fee9f06dd3f30c3b6a00deba38ccc94545274d;hpb=e22cc0cf137149bea3a06bb29ffe06e82d8edb84;p=platform%2Fkernel%2Fu-boot.git

diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index 61fee9f..323952f 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -143,6 +143,8 @@ struct prcm_regs {
 	u32 cm_div_m2_dpll_unipro;
 	u32 cm_ssc_deltamstep_dpll_unipro;
 	u32 cm_ssc_modfreqdiv_dpll_unipro;
+	u32 cm_coreaon_usb_phy_core_clkctrl;
+	u32 cm_coreaon_usb_phy2_core_clkctrl;
 
 	/* cm2.core */
 	u32 cm_coreaon_bandgap_clkctrl;
@@ -224,8 +226,11 @@ struct prcm_regs {
 	u32 cm_l3init_hsusbotg_clkctrl;
 	u32 cm_l3init_hsusbtll_clkctrl;
 	u32 cm_l3init_p1500_clkctrl;
+	u32 cm_l3init_sata_clkctrl;
 	u32 cm_l3init_fsusb_clkctrl;
 	u32 cm_l3init_ocp2scp1_clkctrl;
+	u32 cm_l3init_ocp2scp3_clkctrl;
+	u32 cm_l3init_usb_otg_ss_clkctrl;
 
 	u32 prm_irqstatus_mpu_2;
 
@@ -266,6 +271,7 @@ struct prcm_regs {
 	u32 cm_l4per_mmcsd4_clkctrl;
 	u32 cm_l4per_msprohg_clkctrl;
 	u32 cm_l4per_slimbus2_clkctrl;
+	u32 cm_l4per_qspi_clkctrl;
 	u32 cm_l4per_uart1_clkctrl;
 	u32 cm_l4per_uart2_clkctrl;
 	u32 cm_l4per_uart3_clkctrl;
@@ -347,6 +353,7 @@ struct omap_sys_ctrl_regs {
 	u32 control_core_mac_id_1_lo;
 	u32 control_core_mac_id_1_hi;
 	u32 control_std_fuse_opp_vdd_mpu_2;
+	u32 control_phy_power_usb;
 	u32 control_core_mmr_lock1;
 	u32 control_core_mmr_lock2;
 	u32 control_core_mmr_lock3;
@@ -360,6 +367,7 @@ struct omap_sys_ctrl_regs {
 	u32 control_ldosram_mpu_voltage_ctrl;
 	u32 control_ldosram_core_voltage_ctrl;
 	u32 control_usbotghs_ctrl;
+	u32 control_phy_power_sata;
 	u32 control_padconf_core_base;
 	u32 control_paconf_global;
 	u32 control_paconf_mode;
@@ -532,6 +540,7 @@ extern struct prcm_regs const omap5_es2_prcm;
 extern struct prcm_regs const omap4_prcm;
 extern struct prcm_regs const dra7xx_prcm;
 extern struct dplls const **dplls_data;
+extern struct dplls dra7xx_dplls;
 extern struct vcores_data const **omap_vcores;
 extern const u32 sys_clk_array[8];
 extern struct omap_sys_ctrl_regs const **ctrl;
@@ -539,6 +548,8 @@ extern struct omap_sys_ctrl_regs const omap4_ctrl;
 extern struct omap_sys_ctrl_regs const omap5_ctrl;
 extern struct omap_sys_ctrl_regs const dra7xx_ctrl;
 
+extern struct pmic_data tps659038;
+
 void hw_data_init(void);
 
 const struct dpll_params *get_mpu_dpll_params(struct dplls const *);
@@ -559,7 +570,6 @@ u32 omap_ddr_clk(void);
 u32 get_sys_clk_index(void);
 void enable_basic_clocks(void);
 void enable_basic_uboot_clocks(void);
-void enable_non_essential_clocks(void);
 void scale_vcores(struct vcores_data const *);
 u32 get_offset_code(u32 volt_offset, struct pmic_data *pmic);
 void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic);
@@ -567,11 +577,7 @@ void abb_setup(u32 fuse, u32 ldovbb, u32 setup, u32 control,
 	       u32 txdone, u32 txdone_mask, u32 opp);
 s8 abb_setup_ldovbb(u32 fuse, u32 ldovbb);
 
-/* HW Init Context */
-#define OMAP_INIT_CONTEXT_SPL			0
-#define OMAP_INIT_CONTEXT_UBOOT_FROM_NOR	1
-#define OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL	2
-#define OMAP_INIT_CONTEXT_UBOOT_AFTER_CH	3
+void usb_fake_mac_from_die_id(u32 *id);
 
 /* ABB */
 #define OMAP_ABB_NOMINAL_OPP		0
@@ -592,6 +598,14 @@ static inline u32 omap_revision(void)
 	return *omap_si_rev;
 }
 
+#define OMAP44xx	0x44000000
+
+static inline u8 is_omap44xx(void)
+{
+	extern u32 *const omap_si_rev;
+	return (*omap_si_rev & 0xFF000000) == OMAP44xx;
+};
+
 #define OMAP54xx	0x54000000
 
 static inline u8 is_omap54xx(void)
@@ -599,6 +613,14 @@ static inline u8 is_omap54xx(void)
 	extern u32 *const omap_si_rev;
 	return ((*omap_si_rev & 0xFF000000) == OMAP54xx);
 }
+
+#define DRA7XX		0x07000000
+
+static inline u8 is_dra7xx(void)
+{
+	extern u32 *const omap_si_rev;
+	return ((*omap_si_rev & 0xFF000000) == DRA7XX);
+}
 #endif
 
 /*
@@ -627,6 +649,8 @@ static inline u8 is_omap54xx(void)
 
 /* DRA7XX */
 #define DRA752_ES1_0	0x07520100
+#define DRA752_ES1_1	0x07520110
+#define DRA722_ES1_0	0x07220100
 
 /*
  * SRAM scratch space entries