X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=arch%2Farm%2Finclude%2Fasm%2Farch-mx35%2Fimx-regs.h;h=7b6475a5ef3a821d5c2c74f6a712e8be2518901b;hb=e6500303476d7c6dfcdad2657f7d9f0a7a436697;hp=2c6e59c32452c70156764b3ef27938be1b84a953;hpb=6e2fbdea1b26d75314d87c380a36b0015bf824cf;p=platform%2Fkernel%2Fu-boot.git

diff --git a/arch/arm/include/asm/arch-mx35/imx-regs.h b/arch/arm/include/asm/arch-mx35/imx-regs.h
index 2c6e59c..7b6475a 100644
--- a/arch/arm/include/asm/arch-mx35/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx35/imx-regs.h
@@ -33,6 +33,8 @@
 #define IRAM_BASE_ADDR		0x10000000	/* internal ram */
 #define IRAM_SIZE		0x00020000	/* 128 KB */
 
+#define LOW_LEVEL_SRAM_STACK	0x1001E000
+
 /*
  * AIPS 1
  */
@@ -314,6 +316,58 @@ struct esdc_regs {
 #define ESDC_MISC_DDR_EN	(1 << 8)
 #define ESDC_MISC_DDR2_EN	(1 << 9)
 
+/* Multi-Layer AHB Crossbar Switch (MAX) registers */
+struct max_regs {
+	u32 mpr0;
+	u32 pad00[3];
+	u32 sgpcr0;
+	u32 pad01[59];
+	u32 mpr1;
+	u32 pad02[3];
+	u32 sgpcr1;
+	u32 pad03[59];
+	u32 mpr2;
+	u32 pad04[3];
+	u32 sgpcr2;
+	u32 pad05[59];
+	u32 mpr3;
+	u32 pad06[3];
+	u32 sgpcr3;
+	u32 pad07[59];
+	u32 mpr4;
+	u32 pad08[3];
+	u32 sgpcr4;
+	u32 pad09[251];
+	u32 mgpcr0;
+	u32 pad10[63];
+	u32 mgpcr1;
+	u32 pad11[63];
+	u32 mgpcr2;
+	u32 pad12[63];
+	u32 mgpcr3;
+	u32 pad13[63];
+	u32 mgpcr4;
+	u32 pad14[63];
+	u32 mgpcr5;
+};
+
+/* AHB <-> IP-Bus Interface (AIPS) */
+struct aips_regs {
+	u32 mpr_0_7;
+	u32 mpr_8_15;
+	u32 pad0[6];
+	u32 pacr_0_7;
+	u32 pacr_8_15;
+	u32 pacr_16_23;
+	u32 pacr_24_31;
+	u32 pad1[4];
+	u32 opacr_0_7;
+	u32 opacr_8_15;
+	u32 opacr_16_23;
+	u32 opacr_24_31;
+	u32 opacr_32_39;
+};
+
 /*
  * NFMS bit in RCSR register for pagesize of nandflash
  */