X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=arch%2Farm%2Finclude%2Fasm%2Farch-lpc32xx%2Fconfig.h;h=32d68cbeb81af0ca50c6a4cd2c3023a1531ef9a4;hb=cd6a45a41fb2c19884ac87afade87b4d53601929;hp=41fcd323be370f9dbf47b62e5fbf1cc36225a3fa;hpb=8bd07c9aaf4628931ab8da6eb0f83e517d9381a7;p=platform%2Fkernel%2Fu-boot.git diff --git a/arch/arm/include/asm/arch-lpc32xx/config.h b/arch/arm/include/asm/arch-lpc32xx/config.h index 41fcd32..32d68cb 100644 --- a/arch/arm/include/asm/arch-lpc32xx/config.h +++ b/arch/arm/include/asm/arch-lpc32xx/config.h @@ -1,76 +1,58 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Common definitions for LPC32XX board configurations * - * Copyright (C) 2011 Vladimir Zapolskiy - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. + * Copyright (C) 2011-2015 Vladimir Zapolskiy */ #ifndef _LPC32XX_CONFIG_H #define _LPC32XX_CONFIG_H -/* Basic CPU architecture */ -#define CONFIG_ARM926EJS -#define CONFIG_ARCH_CPU_INIT - -#define CONFIG_NR_DRAM_BANKS_MAX 2 -/* 1KHz clock tick */ -#define CONFIG_SYS_HZ 1000 +/* Basic CPU architecture */ /* UART configuration */ -#if (CONFIG_SYS_LPC32XX_UART >= 3) && (CONFIG_SYS_LPC32XX_UART <= 6) -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_CONS_INDEX (CONFIG_SYS_LPC32XX_UART - 2) -#elif (CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \ - (CONFIG_SYS_LPC32XX_UART == 7) +#if (CONFIG_CONS_INDEX == 1) || (CONFIG_CONS_INDEX == 2) || \ + (CONFIG_CONS_INDEX == 7) +#if !defined(CONFIG_LPC32XX_HSUART) #define CONFIG_LPC32XX_HSUART -#else -#error "define CONFIG_SYS_LPC32XX_UART in the range from 1 to 7" #endif - -#if defined(CONFIG_SYS_NS16550_SERIAL) -#define CONFIG_SYS_NS16550 - -#define CONFIG_SYS_NS16550_REG_SIZE -4 -#define CONFIG_SYS_NS16550_CLK get_serial_clock() - -#define CONFIG_SYS_NS16550_COM1 UART3_BASE -#define CONFIG_SYS_NS16550_COM2 UART4_BASE -#define CONFIG_SYS_NS16550_COM3 UART5_BASE -#define CONFIG_SYS_NS16550_COM4 UART6_BASE #endif -#if defined(CONFIG_LPC32XX_HSUART) -#if CONFIG_SYS_LPC32XX_UART == 1 -#define HS_UART_BASE HS_UART1_BASE -#elif CONFIG_SYS_LPC32XX_UART == 2 -#define HS_UART_BASE HS_UART2_BASE -#else /* CONFIG_SYS_LPC32XX_UART == 7 */ -#define HS_UART_BASE HS_UART7_BASE -#endif +#if !defined(CONFIG_SYS_NS16550_CLK) +#define CONFIG_SYS_NS16550_CLK 13000000 #endif #define CONFIG_SYS_BAUDRATE_TABLE \ { 9600, 19200, 38400, 57600, 115200, 230400, 460800 } +/* Ethernet */ +#define LPC32XX_ETH_BASE ETHERNET_BASE + +/* NAND */ +#if defined(CONFIG_NAND_LPC32XX_SLC) +#define NAND_LARGE_BLOCK_PAGE_SIZE 0x800 +#define NAND_SMALL_BLOCK_PAGE_SIZE 0x200 + +#if (CONFIG_SYS_NAND_PAGE_SIZE == NAND_LARGE_BLOCK_PAGE_SIZE) +#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ + 48, 49, 50, 51, 52, 53, 54, 55, \ + 56, 57, 58, 59, 60, 61, 62, 63, } +#elif (CONFIG_SYS_NAND_PAGE_SIZE == NAND_SMALL_BLOCK_PAGE_SIZE) +#define CONFIG_SYS_NAND_ECCPOS { 10, 11, 12, 13, 14, 15, } +#else +#error "CONFIG_SYS_NAND_PAGE_SIZE set to an invalid value" +#endif + +#define CONFIG_SYS_NAND_ECCSIZE 0x100 +#define CONFIG_SYS_NAND_ECCBYTES 3 +#endif /* CONFIG_NAND_LPC32XX_SLC */ + /* NOR Flash */ -#if defined(CONFIG_SYS_FLASH_CFI) -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_PROTECTION + +/* USB OHCI */ +#if defined(CONFIG_USB_OHCI_LPC32XX) +#define CONFIG_SYS_USB_OHCI_REGS_BASE USB_BASE #endif #endif /* _LPC32XX_CONFIG_H */