X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=arch%2Farm%2Fdts%2Fzynqmp-zc1751-xm015-dc1.dts;h=e2428ec974a3a3f4e558eb1760ca3eab14d9adcc;hb=7a1a01c6029039e4fa6aa185cdbbf9a357eecba7;hp=8824f5cc02729535f31428176fe5a02d273e0396;hpb=ceb6ddbc73607e9395bb5f0ad94159755f049e77;p=platform%2Fkernel%2Fu-boot.git

diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
index 8824f5c..e2428ec 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
@@ -2,7 +2,7 @@
 /*
  * dts file for Xilinx ZynqMP zc1751-xm015-dc1
  *
- * (C) Copyright 2015 - 2018, Xilinx, Inc.
+ * (C) Copyright 2015 - 2020, Xilinx, Inc.
  *
  * Michal Simek <michal.simek@xilinx.com>
  */
@@ -75,7 +75,7 @@
 	status = "okay";
 	phy-handle = <&phy0>;
 	phy-mode = "rgmii-id";
-	phy0: phy@0 {
+	phy0: ethernet-phy@0 {
 		reg = <0>;
 	};
 };
@@ -108,19 +108,19 @@
 		spi-tx-bus-width = <1>;
 		spi-rx-bus-width = <4>;
 		spi-max-frequency = <108000000>; /* Based on DC1 spec */
-		partition@qspi-fsbl-uboot { /* for testing purpose */
+		partition@0 { /* for testing purpose */
 			label = "qspi-fsbl-uboot";
 			reg = <0x0 0x100000>;
 		};
-		partition@qspi-linux { /* for testing purpose */
+		partition@100000 { /* for testing purpose */
 			label = "qspi-linux";
 			reg = <0x100000 0x500000>;
 		};
-		partition@qspi-device-tree { /* for testing purpose */
+		partition@600000 { /* for testing purpose */
 			label = "qspi-device-tree";
 			reg = <0x600000 0x20000>;
 		};
-		partition@qspi-rootfs { /* for testing purpose */
+		partition@620000 { /* for testing purpose */
 			label = "qspi-rootfs";
 			reg = <0x620000 0x5E0000>;
 		};
@@ -148,14 +148,17 @@
 &sdhci0 {
 	status = "okay";
 	bus-width = <8>;
-	xlnx,mio_bank = <0>;
+	xlnx,mio-bank = <0>;
 };
 
 /* SD1 with level shifter */
 &sdhci1 {
 	status = "okay";
-	no-1-8-v;       /* for 1.0 silicon */
-	xlnx,mio_bank = <1>;
+	/*
+	 * This property should be removed for supporting UHS mode
+	 */
+	no-1-8-v;
+	xlnx,mio-bank = <1>;
 };
 
 &uart0 {
@@ -172,32 +175,23 @@
 	dr_mode = "host";
 };
 
-&xilinx_drm {
+&zynqmp_dpsub {
 	status = "okay";
 };
 
-&xlnx_dp {
+&zynqmp_dp_snd_pcm0 {
 	status = "okay";
 };
 
-&xlnx_dp_sub {
+&zynqmp_dp_snd_pcm1 {
 	status = "okay";
-	xlnx,vid-clk-pl;
 };
 
-&xlnx_dp_snd_pcm0 {
+&zynqmp_dp_snd_card0 {
 	status = "okay";
 };
 
-&xlnx_dp_snd_pcm1 {
-	status = "okay";
-};
-
-&xlnx_dp_snd_card {
-	status = "okay";
-};
-
-&xlnx_dp_snd_codec0 {
+&zynqmp_dp_snd_codec0 {
 	status = "okay";
 };