X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=arch%2Farm%2Fdts%2Frk3188-radxarock-u-boot.dtsi;h=7bcbc2967a9edc9e7b3041d5e022545c3f046e6a;hb=605bc145f91d2a28ba2e517cae4e53e255e34b6f;hp=26f5707bb8ff6c533f7e737a102a9eb8289a9c91;hpb=d2a1f120cf638fd8a149bc8a46aec961c2fb9406;p=platform%2Fkernel%2Fu-boot.git

diff --git a/arch/arm/dts/rk3188-radxarock-u-boot.dtsi b/arch/arm/dts/rk3188-radxarock-u-boot.dtsi
index 26f5707..7bcbc29 100644
--- a/arch/arm/dts/rk3188-radxarock-u-boot.dtsi
+++ b/arch/arm/dts/rk3188-radxarock-u-boot.dtsi
@@ -1,24 +1,61 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include "rk3188-u-boot.dtsi"
+
+/ {
+	chosen {
+/*		stdout-path = &uart2; */
+		stdout-path = "serial2:115200n8";
+	};
+
+	config {
+		u-boot,boot-led = "rock:red:power";
+		bootph-all;
+	};
+};
+
 &cru {
-	u-boot,dm-spl;
+	bootph-pre-ram;
 };
 
-&pinctrl {
-	u-boot,dm-spl;
+&dmc {
+	rockchip,pctl-timing = <0x12c 0xc8 0x1f4 0x1e 0x4e 0x4 0x69 0x6
+		0x3 0x0 0x6 0x5 0xc 0x10 0x6 0x4
+		0x4 0x5 0x4 0x200 0x3 0xa 0x40 0x0
+		0x1 0x5 0x5 0x3 0xc 0x1e 0x100 0x0
+		0x4 0x0>;
+	rockchip,phy-timing = <0x208c6690 0x690878 0x10022a00
+		0x220 0x40 0x0 0x0>;
+	rockchip,sdram-params = <0x24716310 0 2 300000000 3 9 0>;
 };
 
-&uart2 {
-	status = "okay";
-	u-boot,dm-spl;
+&emmc {
+	fifo-mode;
+	max-frequency = <16000000>;
+};
+
+&mmc0 {
+	fifo-mode;
+	max-frequency = <16000000>;
+};
+
+&mmc1 {
+	fifo-mode;
+	max-frequency = <16000000>;
+};
+
+&pinctrl {
+	bootph-pre-ram;
 };
 
 &timer3 {
-	compatible = "rockchip,rk3368-timer", "rockchip,rk3288-timer";
-	u-boot,dm-spl;
 	clock-frequency = <24000000>;
+	bootph-pre-ram;
+};
+
+&uart2 {
+	bootph-pre-ram;
 };