X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=arch%2Farm%2Fdts%2Fr8a77970.dtsi;h=664a73a2cc69dc2a66374a9f536a0e4ebc624240;hb=b641dd3ec8dc3f6b18d2fa945ac3ab597063d191;hp=a0808c90ab84c8d5d87360bf28018784ef55a3e0;hpb=cbff9f80cedd4bd4c00ed3fe506b1fc2b209c681;p=platform%2Fkernel%2Fu-boot.git diff --git a/arch/arm/dts/r8a77970.dtsi b/arch/arm/dts/r8a77970.dtsi index a0808c9..664a73a 100644 --- a/arch/arm/dts/r8a77970.dtsi +++ b/arch/arm/dts/r8a77970.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Device Tree Source for the r8a77970 SoC + * Device Tree Source for the R-Car V3M (R8A77970) SoC * * Copyright (C) 2016-2017 Renesas Electronics Corp. * Copyright (C) 2017 Cogent Embedded, Inc. @@ -24,13 +24,20 @@ i2c4 = &i2c4; }; + /* External CAN clock - to be overridden by boards that provide it */ + can_clk: can { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + cpus { #address-cells = <1>; #size-cells = <0>; a53_0: cpu@0 { device_type = "cpu"; - compatible = "arm,cortex-a53", "arm,armv8"; + compatible = "arm,cortex-a53"; reg = <0>; clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>; power-domains = <&sysc R8A77970_PD_CA53_CPU0>; @@ -40,7 +47,7 @@ a53_1: cpu@1 { device_type = "cpu"; - compatible = "arm,cortex-a53", "arm,armv8"; + compatible = "arm,cortex-a53"; reg = <1>; clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>; power-domains = <&sysc R8A77970_PD_CA53_CPU1>; @@ -82,13 +89,6 @@ method = "smc"; }; - /* External CAN clock - to be overridden by boards that provide it */ - can_clk: can { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - /* External SCIF clock - to be overridden by boards that provide it */ scif_clk: scif { compatible = "fixed-clock"; @@ -96,7 +96,7 @@ clock-frequency = <0>; }; - soc: soc { + soc { compatible = "simple-bus"; interrupt-parent = <&gic>; @@ -209,6 +209,76 @@ reg = <0 0xe6060000 0 0x504>; }; + cmt0: timer@e60f0000 { + compatible = "renesas,r8a77970-cmt0", + "renesas,rcar-gen3-cmt0"; + reg = <0 0xe60f0000 0 0x1004>; + interrupts = , + ; + clocks = <&cpg CPG_MOD 303>; + clock-names = "fck"; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 303>; + status = "disabled"; + }; + + cmt1: timer@e6130000 { + compatible = "renesas,r8a77970-cmt1", + "renesas,rcar-gen3-cmt1"; + reg = <0 0xe6130000 0 0x1004>; + interrupts = , + , + , + , + , + , + , + ; + clocks = <&cpg CPG_MOD 302>; + clock-names = "fck"; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 302>; + status = "disabled"; + }; + + cmt2: timer@e6140000 { + compatible = "renesas,r8a77970-cmt1", + "renesas,rcar-gen3-cmt1"; + reg = <0 0xe6140000 0 0x1004>; + interrupts = , + , + , + , + , + , + , + ; + clocks = <&cpg CPG_MOD 301>; + clock-names = "fck"; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 301>; + status = "disabled"; + }; + + cmt3: timer@e6148000 { + compatible = "renesas,r8a77970-cmt1", + "renesas,rcar-gen3-cmt1"; + reg = <0 0xe6148000 0 0x1004>; + interrupts = , + , + , + , + , + , + , + ; + clocks = <&cpg CPG_MOD 300>; + clock-names = "fck"; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 300>; + status = "disabled"; + }; + cpg: clock-controller@e6150000 { compatible = "renesas,r8a77970-cpg-mssr"; reg = <0 0xe6150000 0 0x1000>; @@ -230,22 +300,100 @@ #power-domain-cells = <1>; }; + thermal: thermal@e6190000 { + compatible = "renesas,thermal-r8a77970"; + reg = <0 0xe6190000 0 0x10>, + <0 0xe6190100 0 0x120>; + interrupts = , + , + ; + clocks = <&cpg CPG_MOD 522>; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 522>; + #thermal-sensor-cells = <0>; + }; + intc_ex: interrupt-controller@e61c0000 { compatible = "renesas,intc-ex-r8a77970", "renesas,irqc"; #interrupt-cells = <2>; interrupt-controller; reg = <0 0xe61c0000 0 0x200>; - interrupts = ; + interrupts = , + , + , + , + , + ; clocks = <&cpg CPG_MOD 407>; power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; resets = <&cpg 407>; }; + tmu0: timer@e61e0000 { + compatible = "renesas,tmu-r8a77970", "renesas,tmu"; + reg = <0 0xe61e0000 0 0x30>; + interrupts = , + , + ; + clocks = <&cpg CPG_MOD 125>; + clock-names = "fck"; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 125>; + status = "disabled"; + }; + + tmu1: timer@e6fc0000 { + compatible = "renesas,tmu-r8a77970", "renesas,tmu"; + reg = <0 0xe6fc0000 0 0x30>; + interrupts = , + , + ; + clocks = <&cpg CPG_MOD 124>; + clock-names = "fck"; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 124>; + status = "disabled"; + }; + + tmu2: timer@e6fd0000 { + compatible = "renesas,tmu-r8a77970", "renesas,tmu"; + reg = <0 0xe6fd0000 0 0x30>; + interrupts = , + , + ; + clocks = <&cpg CPG_MOD 123>; + clock-names = "fck"; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 123>; + status = "disabled"; + }; + + tmu3: timer@e6fe0000 { + compatible = "renesas,tmu-r8a77970", "renesas,tmu"; + reg = <0 0xe6fe0000 0 0x30>; + interrupts = , + , + ; + clocks = <&cpg CPG_MOD 122>; + clock-names = "fck"; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 122>; + status = "disabled"; + }; + + tmu4: timer@ffc00000 { + compatible = "renesas,tmu-r8a77970", "renesas,tmu"; + reg = <0 0xffc00000 0 0x30>; + interrupts = , + , + ; + clocks = <&cpg CPG_MOD 121>; + clock-names = "fck"; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 121>; + status = "disabled"; + }; + i2c0: i2c@e6500000 { compatible = "renesas,i2c-r8a77970", "renesas,rcar-gen3-i2c"; @@ -473,6 +621,56 @@ status = "disabled"; }; + pwm0: pwm@e6e30000 { + compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar"; + reg = <0 0xe6e30000 0 8>; + #pwm-cells = <2>; + clocks = <&cpg CPG_MOD 523>; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 523>; + status = "disabled"; + }; + + pwm1: pwm@e6e31000 { + compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar"; + reg = <0 0xe6e31000 0 8>; + #pwm-cells = <2>; + clocks = <&cpg CPG_MOD 523>; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 523>; + status = "disabled"; + }; + + pwm2: pwm@e6e32000 { + compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar"; + reg = <0 0xe6e32000 0 8>; + #pwm-cells = <2>; + clocks = <&cpg CPG_MOD 523>; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 523>; + status = "disabled"; + }; + + pwm3: pwm@e6e33000 { + compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar"; + reg = <0 0xe6e33000 0 8>; + #pwm-cells = <2>; + clocks = <&cpg CPG_MOD 523>; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 523>; + status = "disabled"; + }; + + pwm4: pwm@e6e34000 { + compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar"; + reg = <0 0xe6e34000 0 8>; + #pwm-cells = <2>; + clocks = <&cpg CPG_MOD 523>; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 523>; + status = "disabled"; + }; + scif0: serial@e6e60000 { compatible = "renesas,scif-r8a77970", "renesas,rcar-gen3-scif", @@ -544,6 +742,80 @@ status = "disabled"; }; + tpu: pwm@e6e80000 { + compatible = "renesas,tpu-r8a77970", "renesas,tpu"; + reg = <0 0xe6e80000 0 0x148>; + interrupts = ; + clocks = <&cpg CPG_MOD 304>; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 304>; + #pwm-cells = <3>; + status = "disabled"; + }; + + msiof0: spi@e6e90000 { + compatible = "renesas,msiof-r8a77970", + "renesas,rcar-gen3-msiof"; + reg = <0 0xe6e90000 0 0x64>; + interrupts = ; + clocks = <&cpg CPG_MOD 211>; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 211>; + dmas = <&dmac1 0x41>, <&dmac1 0x40>, + <&dmac2 0x41>, <&dmac2 0x40>; + dma-names = "tx", "rx", "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + msiof1: spi@e6ea0000 { + compatible = "renesas,msiof-r8a77970", + "renesas,rcar-gen3-msiof"; + reg = <0 0xe6ea0000 0 0x0064>; + interrupts = ; + clocks = <&cpg CPG_MOD 210>; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 210>; + dmas = <&dmac1 0x43>, <&dmac1 0x42>, + <&dmac2 0x43>, <&dmac2 0x42>; + dma-names = "tx", "rx", "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + msiof2: spi@e6c00000 { + compatible = "renesas,msiof-r8a77970", + "renesas,rcar-gen3-msiof"; + reg = <0 0xe6c00000 0 0x0064>; + interrupts = ; + clocks = <&cpg CPG_MOD 209>; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 209>; + dmas = <&dmac1 0x45>, <&dmac1 0x44>, + <&dmac2 0x45>, <&dmac2 0x44>; + dma-names = "tx", "rx", "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + msiof3: spi@e6c10000 { + compatible = "renesas,msiof-r8a77970", + "renesas,rcar-gen3-msiof"; + reg = <0 0xe6c10000 0 0x0064>; + interrupts = ; + clocks = <&cpg CPG_MOD 208>; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 208>; + dmas = <&dmac1 0x47>, <&dmac1 0x46>, + <&dmac2 0x47>, <&dmac2 0x46>; + dma-names = "tx", "rx", "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; vin0: video@e6ef0000 { compatible = "renesas,vin-r8a77970"; @@ -567,7 +839,7 @@ vin0csi40: endpoint@2 { reg = <2>; - remote-endpoint= <&csi40vin0>; + remote-endpoint = <&csi40vin0>; }; }; }; @@ -595,7 +867,7 @@ vin1csi40: endpoint@2 { reg = <2>; - remote-endpoint= <&csi40vin1>; + remote-endpoint = <&csi40vin1>; }; }; }; @@ -623,7 +895,7 @@ vin2csi40: endpoint@2 { reg = <2>; - remote-endpoint= <&csi40vin2>; + remote-endpoint = <&csi40vin2>; }; }; }; @@ -651,7 +923,7 @@ vin3csi40: endpoint@2 { reg = <2>; - remote-endpoint= <&csi40vin3>; + remote-endpoint = <&csi40vin3>; }; }; }; @@ -661,15 +933,15 @@ compatible = "renesas,dmac-r8a77970", "renesas,rcar-dmac"; reg = <0 0xe7300000 0 0x10000>; - interrupts = ; + interrupts = , + , + , + , + , + , + , + , + ; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7"; @@ -689,15 +961,15 @@ compatible = "renesas,dmac-r8a77970", "renesas,rcar-dmac"; reg = <0 0xe7310000 0 0x10000>; - interrupts = ; + interrupts = , + , + , + , + , + , + , + , + ; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7"; @@ -754,6 +1026,19 @@ #iommu-cells = <1>; }; + mmc0: mmc@ee140000 { + compatible = "renesas,sdhi-r8a77970", + "renesas,rcar-gen3-sdhi"; + reg = <0 0xee140000 0 0x2000>; + interrupts = ; + clocks = <&cpg CPG_MOD 314>; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 314>; + max-frequency = <200000000>; + iommus = <&ipmmu_ds1 32>; + status = "disabled"; + }; + gic: interrupt-controller@f1010000 { compatible = "arm,gic-400"; #interrupt-cells = <3>; @@ -836,7 +1121,7 @@ clock-names = "du.0"; power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; resets = <&cpg 724>; - vsps = <&vspd0>; + vsps = <&vspd0 0>; status = "disabled"; ports { @@ -891,6 +1176,25 @@ }; }; + thermal-zones { + cpu-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&thermal>; + + cooling-maps { + }; + + trips { + cpu-crit { + temperature = <120000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,