X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=arch%2Farm%2Fdts%2Ffsl-lx2160a.dtsi;h=17ecdc569b37b3060f9424c38bc590c5b070ab04;hb=f660f7af1dcbae145d4188c58fdf4580199760cb;hp=510b070582d1d654a6b2a994c063c53a4cdb7a7e;hpb=176b32cd4fec52307dd8234ec1c86d2f340e7a36;p=platform%2Fkernel%2Fu-boot.git diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi index 510b070..17ecdc5 100644 --- a/arch/arm/dts/fsl-lx2160a.dtsi +++ b/arch/arm/dts/fsl-lx2160a.dtsi @@ -6,6 +6,8 @@ * */ +#include + / { compatible = "fsl,lx2160a"; interrupt-parent = <&gic>; @@ -49,16 +51,105 @@ <1 10 0x8>; /* Hypervisor PPI, active-low */ }; + fspi: flexspi@20c0000 { + compatible = "nxp,lx2160a-fspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x20c0000 0x0 0x10000>, + <0x0 0x20000000 0x0 0x10000000>; + reg-names = "fspi_base", "fspi_mmap"; + clocks = <&clockgen 4 3>, <&clockgen 4 3>; + clock-names = "fspi_en", "fspi"; + interrupts = ; + status = "disabled"; + }; + + i2c0: i2c@2000000 { + compatible = "fsl,vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2000000 0x0 0x10000>; + interrupts = <0 34 4>; + scl-gpio = <&gpio2 15 0>; + status = "disabled"; + }; + + i2c1: i2c@2010000 { + compatible = "fsl,vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2010000 0x0 0x10000>; + interrupts = <0 34 4>; + status = "disabled"; + }; + + i2c2: i2c@2020000 { + compatible = "fsl,vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2020000 0x0 0x10000>; + interrupts = <0 35 4>; + status = "disabled"; + }; + + i2c3: i2c@2030000 { + compatible = "fsl,vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2030000 0x0 0x10000>; + interrupts = <0 35 4>; + status = "disabled"; + }; + + i2c4: i2c@2040000 { + compatible = "fsl,vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2040000 0x0 0x10000>; + interrupts = <0 74 4>; + scl-gpio = <&gpio2 16 0>; + status = "disabled"; + }; + + i2c5: i2c@2050000 { + compatible = "fsl,vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2050000 0x0 0x10000>; + interrupts = <0 74 4>; + status = "disabled"; + }; + + i2c6: i2c@2060000 { + compatible = "fsl,vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2060000 0x0 0x10000>; + interrupts = <0 75 4>; + status = "disabled"; + }; + + i2c7: i2c@2070000 { + compatible = "fsl,vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2070000 0x0 0x10000>; + interrupts = <0 75 4>; + status = "disabled"; + }; + uart0: serial@21c0000 { compatible = "arm,pl011"; reg = <0x0 0x21c0000 0x0 0x1000>; clocks = <&clockgen 4 0>; + status = "disabled"; }; uart1: serial@21d0000 { compatible = "arm,pl011"; reg = <0x0 0x21d0000 0x0 0x1000>; clocks = <&clockgen 4 0>; + status = "disabled"; }; uart2: serial@21e0000 { @@ -102,6 +193,17 @@ num-cs = <6>; }; + gpio2: gpio@2320000 { + compatible = "fsl,qoriq-gpio"; + reg = <0x0 0x2320000 0x0 0x10000>; + interrupts = <0 37 4>; + gpio-controller; + little-endian; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + usb0: usb3@3100000 { compatible = "fsl,layerscape-dwc3"; reg = <0x0 0x3100000 0x0 0x10000>; @@ -176,4 +278,154 @@ status = "disabled"; }; + + pcie@3400000 { + compatible = "fsl,lx2160a-pcie"; + reg = <0x00 0x03400000 0x0 0x80000 /* PAB registers */ + 0x00 0x03480000 0x0 0x40000 /* LUT registers */ + 0x00 0x034c0000 0x0 0x40000 /* PF control registers */ + 0x80 0x00000000 0x0 0x1000>; /* configuration space */ + reg-names = "ccsr", "lut", "pf_ctrl", "config"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; + }; + + pcie@3500000 { + compatible = "fsl,lx2160a-pcie"; + reg = <0x00 0x03500000 0x0 0x80000 /* PAB registers */ + 0x00 0x03580000 0x0 0x40000 /* LUT registers */ + 0x00 0x035c0000 0x0 0x40000 /* PF control registers */ + 0x88 0x00000000 0x0 0x1000>; /* configuration space */ + reg-names = "ccsr", "lut", "pf_ctrl", "config"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + num-lanes = <2>; + bus-range = <0x0 0xff>; + ranges = <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; + }; + + pcie@3600000 { + compatible = "fsl,lx2160a-pcie"; + reg = <0x00 0x03600000 0x0 0x80000 /* PAB registers */ + 0x00 0x03680000 0x0 0x40000 /* LUT registers */ + 0x00 0x036c0000 0x0 0x40000 /* PF control registers */ + 0x90 0x00000000 0x0 0x1000>; /* configuration space */ + reg-names = "ccsr", "lut", "pf_ctrl", "config"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; + }; + + pcie@3700000 { + compatible = "fsl,lx2160a-pcie"; + reg = <0x00 0x03700000 0x0 0x80000 /* PAB registers */ + 0x00 0x03780000 0x0 0x40000 /* LUT registers */ + 0x00 0x037c0000 0x0 0x40000 /* PF control registers */ + 0x98 0x00000000 0x0 0x1000>; /* configuration space */ + reg-names = "ccsr", "lut", "pf_ctrl", "config"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; + }; + + pcie@3800000 { + compatible = "fsl,lx2160a-pcie"; + reg = <0x00 0x03800000 0x0 0x80000 /* PAB registers */ + 0x00 0x03880000 0x0 0x40000 /* LUT registers */ + 0x00 0x038c0000 0x0 0x40000 /* PF control registers */ + 0xa0 0x00000000 0x0 0x1000>; /* configuration space */ + reg-names = "ccsr", "lut", "pf_ctrl", "config"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; + }; + + pcie@3900000 { + compatible = "fsl,lx2160a-pcie"; + reg = <0x00 0x03900000 0x0 0x80000 /* PAB registers */ + 0x00 0x03980000 0x0 0x40000 /* LUT registers */ + 0x00 0x039c0000 0x0 0x40000 /* PF control registers */ + 0xa8 0x00000000 0x0 0x1000>; /* configuration space */ + reg-names = "ccsr", "lut", "pf_ctrl", "config"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; + }; + + fsl_mc: fsl-mc@80c000000 { + compatible = "fsl,qoriq-mc", "simple-mfd"; + reg = <0x00000008 0x0c000000 0 0x40>, + <0x00000000 0x08340000 0 0x40000>; + #address-cells = <3>; + #size-cells = <1>; + + /* + * Region type 0x0 - MC portals + * Region type 0x1 - QBMAN portals + */ + ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000 + 0x1 0x0 0x0 0x8 0x18000000 0x8000000>; + + dpmacs { + compatible = "simple-mfd"; + #address-cells = <1>; + #size-cells = <0>; + + dpmac3: dpmac@3 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x3>; + status = "disabled"; + }; + + dpmac4: dpmac@4 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x4>; + status = "disabled"; + }; + + dpmac17: dpmac@11 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x11>; + status = "disabled"; + }; + + dpmac18: dpmac@12 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x12>; + status = "disabled"; + }; + }; + }; + + /* WRIOP0: 0x8b8_0000, E-MDIO1: 0x1_6000 */ + emdio1: mdio@8b96000 { + compatible = "fsl,ls-mdio"; + reg = <0x0 0x8b96000 0x0 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + /* WRIOP0: 0x8b8_0000, E-MDIO2: 0x1_7000 */ + emdio2: mdio@8b97000 { + compatible = "fsl,ls-mdio"; + reg = <0x0 0x8b97000 0x0 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; };