X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=arch%2Farm%2Fdts%2Ffsl-ls1012a.dtsi;h=c401ba33ac532689bbfca5dda48dc2951d868d59;hb=5a1a8a63be8f7262a300eddafb18020926b12fb6;hp=215e095c32492a6aba1858c4ba25452e38c63637;hpb=ab21ecef7a38dd211fe6db35c6e60800445eb6a2;p=platform%2Fkernel%2Fu-boot.git

diff --git a/arch/arm/dts/fsl-ls1012a.dtsi b/arch/arm/dts/fsl-ls1012a.dtsi
index 215e095..c401ba3 100644
--- a/arch/arm/dts/fsl-ls1012a.dtsi
+++ b/arch/arm/dts/fsl-ls1012a.dtsi
@@ -1,7 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
 /*
+ * Copyright 2020 NXP
  * Copyright 2016 Freescale Semiconductor
- *
- * SPDX-License-Identifier:	GPL-2.0+	X11
  */
 
 /include/ "skeleton64.dtsi"
@@ -108,18 +108,16 @@
 		};
 
 		qspi: quadspi@1550000 {
-			compatible = "fsl,vf610-qspi";
+			compatible = "fsl,ls1021a-qspi";
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <0x0 0x1550000 0x0 0x10000>,
 				<0x0 0x40000000 0x0 0x4000000>;
 			reg-names = "QuadSPI", "QuadSPI-memory";
-			num-cs = <1>;
-			big-endian;
 			status = "disabled";
 		};
 
-		pcie@3400000 {
+		pcie1: pcie@3400000 {
 			compatible = "fsl,ls-pcie", "snps,dw-pcie";
 			reg = <0x00 0x03400000 0x0 0x80000   /* dbi registers */
 			       0x00 0x03480000 0x0 0x40000   /* lut registers */
@@ -135,6 +133,16 @@
 				  0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 		};
 
+		sata: sata@3200000 {
+			compatible = "fsl,ls1012a-ahci";
+			reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */
+			       0x0 0x20140520 0x0 0x4>;	 /* ecc sata addr */
+			reg-names = "sata-base", "ecc-addr";
+			interrupts = <0 69 4>;
+			clocks = <&clockgen 4 0>;
+			status = "disabled";
+		};
+
 		usb0: usb2@8600000 {
 			compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
 			reg = <0x0 0x8600000 0x0 0x1000>;