X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=arch%2Farm%2Fcpu%2Farmv7%2Fls102xa%2Ffdt.c;h=599b7e18ef31e28c7e93895629f653338b64cb91;hb=65cc0e2a65d2c9f107b2f42db6396d9ade6c5ad8;hp=4ce38086f4e96245bdb92b9f7c17e70f50997458;hpb=e38b15b0619f9a8b869896229355808f494fb2ac;p=platform%2Fkernel%2Fu-boot.git diff --git a/arch/arm/cpu/armv7/ls102xa/fdt.c b/arch/arm/cpu/armv7/ls102xa/fdt.c index 4ce3808..599b7e1 100644 --- a/arch/arm/cpu/armv7/ls102xa/fdt.c +++ b/arch/arm/cpu/armv7/ls102xa/fdt.c @@ -1,11 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2014 Freescale Semiconductor, Inc. - * - * SPDX-License-Identifier: GPL-2.0+ */ #include -#include +#include +#include +#include +#include #include #include #include @@ -15,41 +17,54 @@ #include #endif #include +#include +#include +#include DECLARE_GLOBAL_DATA_PTR; void ft_fixup_enet_phy_connect_type(void *fdt) { +#ifdef CONFIG_DM_ETH + struct udevice *dev; +#else struct eth_device *dev; +#endif struct tsec_private *priv; const char *enet_path, *phy_path; char enet[16]; char phy[16]; int phy_node; int i = 0; - int enet_id = 0; uint32_t ph; +#ifdef CONFIG_DM_ETH + char *name[3] = { "ethernet@2d10000", "ethernet@2d50000", + "ethernet@2d90000" }; +#else + char *name[3] = { "eTSEC1", "eTSEC2", "eTSEC3" }; +#endif - while ((dev = eth_get_dev_by_index(i++)) != NULL) { - if (strstr(dev->name, "eTSEC1")) - enet_id = 0; - else if (strstr(dev->name, "eTSEC2")) - enet_id = 1; - else if (strstr(dev->name, "eTSEC3")) - enet_id = 2; - else + for (; i < ARRAY_SIZE(name); i++) { + dev = eth_get_dev_by_name(name[i]); + if (dev) { + sprintf(enet, "ethernet%d", i); + sprintf(phy, "enet%d_rgmii_phy", i); + } else { continue; + } +#ifdef CONFIG_DM_ETH + priv = dev_get_priv(dev); +#else priv = dev->priv; +#endif if (priv->flags & TSEC_SGMII) continue; - sprintf(enet, "ethernet%d", enet_id); enet_path = fdt_get_alias(fdt, enet); if (!enet_path) continue; - sprintf(phy, "enet%d_rgmii_phy", enet_id); phy_path = fdt_get_alias(fdt, phy); if (!phy_path) continue; @@ -66,21 +81,34 @@ void ft_fixup_enet_phy_connect_type(void *fdt) do_fixup_by_path(fdt, enet_path, "phy-connection-type", phy_string_for_interface( PHY_INTERFACE_MODE_RGMII_ID), - sizeof(phy_string_for_interface( - PHY_INTERFACE_MODE_RGMII_ID)), + strlen(phy_string_for_interface( + PHY_INTERFACE_MODE_RGMII_ID)) + 1, 1); } } -void ft_cpu_setup(void *blob, bd_t *bd) +void ft_cpu_setup(void *blob, struct bd_info *bd) { int off; int val; const char *sysclk_path; + struct ccsr_gur __iomem *gur = (void *)(CFG_SYS_FSL_GUTS_ADDR); + unsigned int svr; + svr = in_be32(&gur->svr); unsigned long busclk = get_bus_freq(0); - fdt_fixup_ethernet(blob); + /* delete crypto node if not on an E-processor */ + if (!IS_E_PROCESSOR(svr)) + fdt_fixup_crypto_node(blob, 0); +#if CONFIG_SYS_FSL_SEC_COMPAT >= 4 + else { + ccsr_sec_t __iomem *sec; + + sec = (void __iomem *)CFG_SYS_FSL_SEC_ADDR; + fdt_fixup_crypto_node(blob, sec_in32(&sec->secvid_ms)); + } +#endif off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); while (off != -FDT_ERR_NOTFOUND) { @@ -91,21 +119,40 @@ void ft_cpu_setup(void *blob, bd_t *bd) } do_fixup_by_prop_u32(blob, "device_type", "soc", - 4, "bus-frequency", busclk / 2, 1); + 4, "bus-frequency", busclk, 1); ft_fixup_enet_phy_connect_type(blob); #ifdef CONFIG_SYS_NS16550 do_fixup_by_compat_u32(blob, "fsl,16550-FIFO64", - "clock-frequency", CONFIG_SYS_NS16550_CLK, 1); + "clock-frequency", CFG_SYS_NS16550_CLK, 1); #endif sysclk_path = fdt_get_alias(blob, "sysclk"); if (sysclk_path) do_fixup_by_path_u32(blob, sysclk_path, "clock-frequency", - CONFIG_SYS_CLK_FREQ, 1); + get_board_sys_clk(), 1); do_fixup_by_compat_u32(blob, "fsl,qoriq-sysclk-2.0", - "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); + "clock-frequency", get_board_sys_clk(), 1); + +#if defined(CONFIG_DEEP_SLEEP) && defined(CONFIG_SD_BOOT) +#define UBOOT_HEAD_LEN 0x1000 + /* + * Reserved memory in SD boot deep sleep case. + * Second stage uboot binary and malloc space should be reserved. + * If the memory they occupied has not been reserved, then this + * space would be used by kernel and overwritten in uboot when + * deep sleep resume, which cause deep sleep failed. + * Since second uboot binary has a head, that space need to be + * reserved either(assuming its size is less than 0x1000). + */ + off = fdt_add_mem_rsv(blob, CONFIG_TEXT_BASE - UBOOT_HEAD_LEN, + CONFIG_SYS_MONITOR_LEN + + CONFIG_SYS_SPL_MALLOC_SIZE + UBOOT_HEAD_LEN); + if (off < 0) + printf("Failed to reserve memory for SD boot deep sleep: %s\n", + fdt_strerror(off)); +#endif #if defined(CONFIG_FSL_ESDHC) fdt_fixup_esdhc(blob, bd); @@ -133,4 +180,17 @@ void ft_cpu_setup(void *blob, bd_t *bd) do_fixup_by_compat_u32(blob, "fsl, ls1021a-flexcan", "clock-frequency", busclk / 2, 1); + +#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) + off = fdt_node_offset_by_compat_reg(blob, FSL_IFC_COMPAT, + CFG_SYS_IFC_ADDR); + fdt_set_node_status(blob, off, FDT_STATUS_DISABLED); +#else + off = fdt_node_offset_by_compat_reg(blob, FSL_QSPI_COMPAT, + QSPI0_BASE_ADDR); + fdt_set_node_status(blob, off, FDT_STATUS_DISABLED); + off = fdt_node_offset_by_compat_reg(blob, FSL_DSPI_COMPAT, + DSPI1_BASE_ADDR); + fdt_set_node_status(blob, off, FDT_STATUS_DISABLED); +#endif }