X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=arch%2Farm%2Fcpu%2Farmv7%2Fcpu.c;h=0b0e5003cc3c390e9cb86fe13d8426e5840ae731;hb=0d3f732fd2ba679b4498541f075d1b1bdbea3935;hp=091e3e0842d5506b2b6351a404ee06e8cb75d594;hpb=fb6440ee9b110b759ef61fd80bbd0df1bbf0f37b;p=platform%2Fkernel%2Fu-boot.git

diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index 091e3e0..0b0e500 100644
--- a/arch/arm/cpu/armv7/cpu.c
+++ b/arch/arm/cpu/armv7/cpu.c
@@ -8,23 +8,7 @@
  * (C) Copyright 2002
  * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 /*
@@ -36,15 +20,11 @@
 #include <asm/system.h>
 #include <asm/cache.h>
 #include <asm/armv7.h>
+#include <linux/compiler.h>
 
-void save_boot_params_default(u32 r0, u32 r1, u32 r2, u32 r3)
-{
-}
-
-void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3)
-	__attribute__((weak, alias("save_boot_params_default")));
+void __weak cpu_cache_initialization(void){}
 
-int cleanup_before_linux(void)
+int cleanup_before_linux_select(int flags)
 {
 	/*
 	 * this function is called just before we call linux
@@ -52,7 +32,9 @@ int cleanup_before_linux(void)
 	 *
 	 * we turn off caches etc ...
 	 */
+#ifndef CONFIG_SPL_BUILD
 	disable_interrupts();
+#endif
 
 	/*
 	 * Turn off I-cache and invalidate it
@@ -60,23 +42,40 @@ int cleanup_before_linux(void)
 	icache_disable();
 	invalidate_icache_all();
 
-	/*
-	 * turn off D-cache
-	 * dcache_disable() in turn flushes the d-cache and disables MMU
-	 */
-	dcache_disable();
+	if (flags & CBL_DISABLE_CACHES) {
+		/*
+		* turn off D-cache
+		* dcache_disable() in turn flushes the d-cache and disables MMU
+		*/
+		dcache_disable();
+		v7_outer_cache_disable();
+
+		/*
+		* After D-cache is flushed and before it is disabled there may
+		* be some new valid entries brought into the cache. We are
+		* sure that these lines are not dirty and will not affect our
+		* execution. (because unwinding the call-stack and setting a
+		* bit in CP15 SCTRL is all we did during this. We have not
+		* pushed anything on to the stack. Neither have we affected
+		* any static data) So just invalidate the entire d-cache again
+		* to avoid coherency problems for kernel
+		*/
+		invalidate_dcache_all();
+	} else {
+		flush_dcache_all();
+		invalidate_icache_all();
+		icache_enable();
+	}
 
 	/*
-	 * After D-cache is flushed and before it is disabled there may
-	 * be some new valid entries brought into the cache. We are sure
-	 * that these lines are not dirty and will not affect our execution.
-	 * (because unwinding the call-stack and setting a bit in CP15 SCTRL
-	 * is all we did during this. We have not pushed anything on to the
-	 * stack. Neither have we affected any static data)
-	 * So just invalidate the entire d-cache again to avoid coherency
-	 * problems for kernel
+	 * Some CPU need more cache attention before starting the kernel.
 	 */
-	invalidate_dcache_all();
+	cpu_cache_initialization();
 
 	return 0;
 }
+
+int cleanup_before_linux(void)
+{
+	return cleanup_before_linux_select(CBL_ALL);
+}