X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=arch%2Farm%2Fcpu%2Farm1136%2Fstart.S;h=5d3b4c2299ef05659066c2f259205274a5c4710e;hb=b736e4b929197b5141b883f4f3906c4bd38dd4f3;hp=5008ac6e9e2f1a139d306e75122f3c8a91a021e6;hpb=d48455ad8cefd25d7b49f68fd16d0e9fd551732a;p=platform%2Fkernel%2Fu-boot.git diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index 5008ac6..5d3b4c2 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -3,8 +3,8 @@ * * Copyright (c) 2004 Texas Instruments * - * Copyright (c) 2001 Marius Gröger - * Copyright (c) 2002 Alex Züpke + * Copyright (c) 2001 Marius Gröger + * Copyright (c) 2002 Alex Züpke * Copyright (c) 2002 Gary Jennejohn * Copyright (c) 2003 Richard Woodruff * Copyright (c) 2003 Kshitij @@ -28,11 +28,12 @@ * MA 02111-1307 USA */ +#include #include #include .globl _start _start: b reset -#ifdef CONFIG_PRELOADER +#ifdef CONFIG_SPL_BUILD ldr pc, _hang ldr pc, _hang ldr pc, _hang @@ -67,7 +68,7 @@ _not_used: .word not_used _irq: .word irq _fiq: .word fiq _pad: .word 0x12345678 /* now 16*4=64 */ -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */ .global _end_vect _end_vect: @@ -89,48 +90,27 @@ _end_vect: _TEXT_BASE: .word CONFIG_SYS_TEXT_BASE -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -.globl _armboot_start -_armboot_start: - .word _start -#endif - /* * These are defined in the board-specific linker script. + * Subtracting _start from them lets the linker put their + * relative position in the executable instead of leaving + * them null. */ -.globl _bss_start -_bss_start: - .word __bss_start - -.globl _bss_end -_bss_end: - .word _end - -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -.globl _datarel_start -_datarel_start: - .word __datarel_start - -.globl _datarelrolocal_start -_datarelrolocal_start: - .word __datarelrolocal_start - -.globl _datarellocal_start -_datarellocal_start: - .word __datarellocal_start - -.globl _datarelro_start -_datarelro_start: - .word __datarelro_start - -.globl _got_start -_got_start: - .word __got_start - -.globl _got_end -_got_end: - .word __got_end -#endif +.globl _bss_start_ofs +_bss_start_ofs: + .word __bss_start - _start + +.global _image_copy_end_ofs +_image_copy_end_ofs: + .word __image_copy_end - _start + +.globl _bss_end_ofs +_bss_end_ofs: + .word __bss_end__ - _start + +.globl _end_ofs +_end_ofs: + .word _end - _start #ifdef CONFIG_USE_IRQ /* IRQ stack memory (calculated at run-time) */ @@ -144,14 +124,11 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: .word 0x0badc0de -#endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* * the actual reset code */ @@ -191,17 +168,10 @@ next: /* Set stackpointer in internal RAM to call board_init_f */ call_board_init_f: ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ ldr r0,=0x00000000 -#ifdef CONFIG_NAND_SPL - bl nand_boot -#else -#ifdef CONFIG_ONENAND_IPL - bl start_oneboot -#else bl board_init_f -#endif /* CONFIG_ONENAND_IPL */ -#endif /* CONFIG_NAND_SPL */ /*------------------------------------------------------------------------------*/ @@ -217,189 +187,121 @@ relocate_code: mov r4, r0 /* save addr_sp */ mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - mov r7, r2 /* save addr of destination */ /* Set up the stack */ stack_setup: mov sp, r4 adr r0, _start - ldr r2, _TEXT_BASE - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ cmp r0, r6 - beq clear_bss + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ + beq clear_bss /* skip relocation */ + mov r1, r6 /* r1 <- scratch for copy_loop */ + ldr r3, _image_copy_end_ofs + add r2, r0, r3 /* r2 <- source end address */ -#ifndef CONFIG_SKIP_RELOCATE_UBOOT copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ - stmia r6!, {r9-r10} /* copy to target address [r1] */ + stmia r1!, {r9-r10} /* copy to target address [r1] */ cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER - /* fix got entries */ - ldr r1, _TEXT_BASE - mov r0, r7 /* reloc addr */ - ldr r2, _got_start /* addr in Flash */ - ldr r3, _got_end /* addr in Flash */ - sub r3, r3, r1 - add r3, r3, r0 - sub r2, r2, r1 - add r2, r2, r0 - +#ifndef CONFIG_SPL_BUILD + /* + * fix .rel.dyn relocations + */ + ldr r0, _TEXT_BASE /* r0 <- Text base */ + sub r9, r6, r0 /* r9 <- relocation offset */ + ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ + add r10, r10, r0 /* r10 <- sym table in FLASH */ + ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ + add r2, r2, r0 /* r2 <- rel dyn start in FLASH */ + ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */ + add r3, r3, r0 /* r3 <- rel dyn end in FLASH */ fixloop: - ldr r4, [r2] - sub r4, r4, r1 - add r4, r4, r0 - str r4, [r2] - add r2, r2, #4 + ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ + add r0, r0, r9 /* r0 <- location to fix up in RAM */ + ldr r1, [r2, #4] + and r7, r1, #0xff + cmp r7, #23 /* relative fixup? */ + beq fixrel + cmp r7, #2 /* absolute fixup? */ + beq fixabs + /* ignore unknown type of fixup */ + b fixnext +fixabs: + /* absolute fix: set location to (offset) symbol value */ + mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ + add r1, r10, r1 /* r1 <- address of symbol in table */ + ldr r1, [r1, #4] /* r1 <- symbol value */ + add r1, r1, r9 /* r1 <- relocated sym addr */ + b fixnext +fixrel: + /* relative fix: increase location by offset */ + ldr r1, [r0] + add r1, r1, r9 +fixnext: + str r1, [r0] + add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ cmp r2, r3 - bne fixloop + blo fixloop + b clear_bss + +_rel_dyn_start_ofs: + .word __rel_dyn_start - _start +_rel_dyn_end_ofs: + .word __rel_dyn_end - _start +_dynsym_start_ofs: + .word __dynsym_start - _start #endif -#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ clear_bss: -#ifndef CONFIG_PRELOADER - ldr r0, _bss_start - ldr r1, _bss_end - ldr r3, _TEXT_BASE /* Text base */ - mov r4, r7 /* reloc addr */ - sub r0, r0, r3 +#ifdef CONFIG_SPL_BUILD + /* No relocation for SPL */ + ldr r0, =__bss_start + ldr r1, =__bss_end__ +#else + ldr r0, _bss_start_ofs + ldr r1, _bss_end_ofs + mov r4, r6 /* reloc addr */ add r0, r0, r4 - sub r1, r1, r3 add r1, r1, r4 +#endif mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l -#endif /* #ifndef CONFIG_PRELOADER */ + b clbss_l +clbss_e: /* * We are done. Do not return, instead branch to second part of board * initialization, now running from RAM. */ #ifdef CONFIG_NAND_SPL - ldr pc, _nand_boot + ldr r0, _nand_boot_ofs + mov pc, r0 -_nand_boot: .word nand_boot +_nand_boot_ofs: + .word nand_boot #else jump_2_ram: - ldr r0, _TEXT_BASE - ldr r2, _board_init_r - sub r2, r2, r0 - add r2, r2, r7 /* position from board_init_r in RAM */ + ldr r0, _board_init_r_ofs + adr r1, _start + add lr, r0, r1 + add lr, lr, r9 /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ - mov r1, r7 /* dest_addr */ + mov r1, r6 /* dest_addr */ /* jump to it ... */ - mov lr, r2 mov pc, lr -_board_init_r: .word board_init_r -#endif -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ -/* - * the actual reset code - */ - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0,cpsr - bic r0,r0,#0x1f - orr r0,r0,#0xd3 - msr cpsr,r0 - -#ifdef CONFIG_OMAP2420H4 - /* Copy vectors to mask ROM indirect addr */ - adr r0, _start /* r0 <- current position of code */ - add r0, r0, #4 /* skip reset vector */ - mov r2, #64 /* r2 <- size to copy */ - add r2, r0, r2 /* r2 <- source end address */ - mov r1, #SRAM_OFFSET0 /* build vect addr */ - mov r3, #SRAM_OFFSET1 - add r1, r1, r3 - mov r3, #SRAM_OFFSET2 - add r1, r1, r3 -next: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - bne next /* loop until equal */ - bl cpy_clk_code /* put dpll adjust code behind vectors */ -#endif - /* the mask ROM code should have PLL and others stable */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit -#endif - -#ifndef CONFIG_SKIP_RELOCATE_UBOOT -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ -#ifndef CONFIG_PRELOADER - beq stack_setup -#endif /* CONFIG_PRELOADER */ - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ -#ifdef CONFIG_PRELOADER - sub sp, r0, #128 /* leave 32 words for abort-stack */ -#else - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */ -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) -#endif - sub sp, r0, #12 /* leave 3 words for abort-stack */ -#endif /* CONFIG_PRELOADER */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - -clear_bss: - ldr r0, _bss_start /* find start of bss segment */ - ldr r1, _bss_end /* stop here */ - mov r2, #0x00000000 /* clear */ - -#ifndef CONFIG_PRELOADER -clbss_l:str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - bne clbss_l +_board_init_r_ofs: + .word board_init_r - _start #endif - ldr pc, _start_armboot - -#ifdef CONFIG_NAND_SPL -_start_armboot: .word nand_boot -#else -#ifdef CONFIG_ONENAND_IPL -_start_armboot: .word start_oneboot -#else -_start_armboot: .word start_armboot -#endif /* CONFIG_ONENAND_IPL */ -#endif /* CONFIG_NAND_SPL */ - -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /* ************************************************************************* * @@ -439,7 +341,7 @@ cpu_init_crit: mov pc, lr /* back to my caller */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* ************************************************************************* * @@ -484,13 +386,7 @@ cpu_init_crit: sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12 -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r2, IRQ_STACK_START_IN @ set base 2 words into abort stack -#else - ldr r2, _armboot_start - sub r2, r2, #(CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack -#endif ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs) add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack @@ -521,13 +417,7 @@ cpu_init_crit: .endm .macro get_bad_stack -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r13, IRQ_STACK_START_IN @ setup our mode stack (enter in banked mode) -#else - ldr r13, _armboot_start @ setup our mode stack (enter in banked mode) - sub r13, r13, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool - sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ move to reserved a couple spots for abort stack -#endif str lr, [r13] @ save caller lr in position 0 of saved stack mrs lr, spsr @ get the spsr @@ -543,13 +433,7 @@ cpu_init_crit: .macro get_bad_stack_swi sub r13, r13, #4 @ space on current stack for scratch reg. str r0, [r13] @ save R0's value. -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r0, IRQ_STACK_START_IN @ get data regions start -#else - ldr r0, _armboot_start @ get data regions start - sub r0, r0, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool - sub r0, r0, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ move past gbl and a couple spots for abort stack -#endif str lr, [r0] @ save caller lr in position 0 of saved stack mrs r0, spsr @ get the spsr str lr, [r0, #4] @ save spsr in position 1 of saved stack @@ -564,17 +448,17 @@ cpu_init_crit: .macro get_fiq_stack @ setup FIQ stack ldr sp, FIQ_STACK_START .endm -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */ /* * exception handlers */ -#ifdef CONFIG_PRELOADER +#ifdef CONFIG_SPL_BUILD .align 5 do_hang: ldr sp, _TEXT_BASE /* use 32 words about stack */ bl hang /* hang and never return */ -#else /* !CONFIG_PRELOADER */ +#else /* !CONFIG_SPL_BUILD */ .align 5 undefined_instruction: get_bad_stack @@ -640,11 +524,11 @@ fiq: .align 5 .global arm1136_cache_flush arm1136_cache_flush: -#if !defined(CONFIG_SYS_NO_ICACHE) +#if !defined(CONFIG_SYS_ICACHE_OFF) mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache #endif -#if !defined(CONFIG_SYS_NO_DCACHE) +#if !defined(CONFIG_SYS_DCACHE_OFF) mcr p15, 0, r1, c7, c14, 0 @ invalidate D cache #endif mov pc, lr @ back to caller -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */