X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=arch%2Farm%2Fcpu%2Farm1136%2Fstart.S;h=5d3b4c2299ef05659066c2f259205274a5c4710e;hb=b736e4b929197b5141b883f4f3906c4bd38dd4f3;hp=3c5f3ef5fab1ca6f5bb2bce45070487f7cd302d5;hpb=c04bf5e9a45d7335681352faa125193258f8e976;p=platform%2Fkernel%2Fu-boot.git diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index 3c5f3ef..5d3b4c2 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -3,8 +3,8 @@ * * Copyright (c) 2004 Texas Instruments * - * Copyright (c) 2001 Marius Gröger - * Copyright (c) 2002 Alex Züpke + * Copyright (c) 2001 Marius Gröger + * Copyright (c) 2002 Alex Züpke * Copyright (c) 2002 Gary Jennejohn * Copyright (c) 2003 Richard Woodruff * Copyright (c) 2003 Kshitij @@ -33,7 +33,7 @@ #include .globl _start _start: b reset -#ifdef CONFIG_PRELOADER +#ifdef CONFIG_SPL_BUILD ldr pc, _hang ldr pc, _hang ldr pc, _hang @@ -68,7 +68,7 @@ _not_used: .word not_used _irq: .word irq _fiq: .word fiq _pad: .word 0x12345678 /* now 16*4=64 */ -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */ .global _end_vect _end_vect: @@ -100,6 +100,10 @@ _TEXT_BASE: _bss_start_ofs: .word __bss_start - _start +.global _image_copy_end_ofs +_image_copy_end_ofs: + .word __image_copy_end - _start + .globl _bss_end_ofs _bss_end_ofs: .word __bss_end__ - _start @@ -190,9 +194,10 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ - ldr r3, _bss_start_ofs + ldr r3, _image_copy_end_ofs add r2, r0, r3 /* r2 <- source end address */ copy_loop: @@ -201,7 +206,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -240,22 +245,36 @@ fixnext: add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ cmp r2, r3 blo fixloop + b clear_bss + +_rel_dyn_start_ofs: + .word __rel_dyn_start - _start +_rel_dyn_end_ofs: + .word __rel_dyn_end - _start +_dynsym_start_ofs: + .word __dynsym_start - _start #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifdef CONFIG_SPL_BUILD + /* No relocation for SPL */ + ldr r0, =__bss_start + ldr r1, =__bss_end__ +#else ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ add r0, r0, r4 add r1, r1, r4 +#endif mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l -#endif /* #ifndef CONFIG_PRELOADER */ + b clbss_l +clbss_e: /* * We are done. Do not return, instead branch to second part of board @@ -270,7 +289,7 @@ _nand_boot_ofs: #else jump_2_ram: ldr r0, _board_init_r_ofs - ldr r1, _TEXT_BASE + adr r1, _start add lr, r0, r1 add lr, lr, r9 /* setup parameters for board_init_r */ @@ -283,13 +302,6 @@ _board_init_r_ofs: .word board_init_r - _start #endif -_rel_dyn_start_ofs: - .word __rel_dyn_start - _start -_rel_dyn_end_ofs: - .word __rel_dyn_end - _start -_dynsym_start_ofs: - .word __dynsym_start - _start - /* ************************************************************************* * @@ -329,7 +341,7 @@ cpu_init_crit: mov pc, lr /* back to my caller */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* ************************************************************************* * @@ -436,17 +448,17 @@ cpu_init_crit: .macro get_fiq_stack @ setup FIQ stack ldr sp, FIQ_STACK_START .endm -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */ /* * exception handlers */ -#ifdef CONFIG_PRELOADER +#ifdef CONFIG_SPL_BUILD .align 5 do_hang: ldr sp, _TEXT_BASE /* use 32 words about stack */ bl hang /* hang and never return */ -#else /* !CONFIG_PRELOADER */ +#else /* !CONFIG_SPL_BUILD */ .align 5 undefined_instruction: get_bad_stack @@ -512,11 +524,11 @@ fiq: .align 5 .global arm1136_cache_flush arm1136_cache_flush: -#if !defined(CONFIG_SYS_NO_ICACHE) +#if !defined(CONFIG_SYS_ICACHE_OFF) mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache #endif -#if !defined(CONFIG_SYS_NO_DCACHE) +#if !defined(CONFIG_SYS_DCACHE_OFF) mcr p15, 0, r1, c7, c14, 0 @ invalidate D cache #endif mov pc, lr @ back to caller -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */