X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=arch%2Farm%2Fcpu%2Farm1136%2Fmx31%2Fgeneric.c;h=fccd2cdaa85485366eb76ead7c573bc48f6d8519;hb=2f22045be5590e3034b0d55cac9fd050f7837a17;hp=9b7a7a24c15b8a4cd8ddd0225a525be67e32ae21;hpb=4adaf9bf097b57af12f9a598759f8c9990e3502e;p=platform%2Fkernel%2Fu-boot.git

diff --git a/arch/arm/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c
index 9b7a7a2..fccd2cd 100644
--- a/arch/arm/cpu/arm1136/mx31/generic.c
+++ b/arch/arm/cpu/arm1136/mx31/generic.c
@@ -107,18 +107,18 @@ void mx31_set_pad(enum iomux_pins pin, u32 config)
 }
 
 struct mx3_cpu_type mx31_cpu_type[] = {
-	{ .srev = 0x00,	.v = "1.0"  },
-	{ .srev = 0x10,	.v = "1.1"  },
-	{ .srev = 0x11,	.v = "1.1"  },
-	{ .srev = 0x12,	.v = "1.15" },
-	{ .srev = 0x13,	.v = "1.15" },
-	{ .srev = 0x14,	.v = "1.2"  },
-	{ .srev = 0x15,	.v = "1.2"  },
-	{ .srev = 0x28,	.v = "2.0"  },
-	{ .srev = 0x29,	.v = "2.0"  },
+	{ .srev = 0x00, .v = 0x10 },
+	{ .srev = 0x10, .v = 0x11 },
+	{ .srev = 0x11, .v = 0x11 },
+	{ .srev = 0x12, .v = 0x1F },
+	{ .srev = 0x13, .v = 0x1F },
+	{ .srev = 0x14, .v = 0x12 },
+	{ .srev = 0x15, .v = 0x12 },
+	{ .srev = 0x28, .v = 0x20 },
+	{ .srev = 0x29, .v = 0x20 },
 };
 
-char *get_cpu_rev(void)
+u32 get_cpu_rev(void)
 {
 	u32 i, srev;
 
@@ -129,14 +129,46 @@ char *get_cpu_rev(void)
 	for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
 		if (srev == mx31_cpu_type[i].srev)
 			return mx31_cpu_type[i].v;
-		return "unknown";
+
+	return srev | 0x8000;
+}
+
+char *get_reset_cause(void)
+{
+	/* read RCSR register from CCM module */
+	struct clock_control_regs *ccm =
+		(struct clock_control_regs *)CCM_BASE;
+
+	u32 cause = readl(&ccm->rcsr) & 0x07;
+
+	switch (cause) {
+	case 0x0000:
+		return "POR";
+		break;
+	case 0x0001:
+		return "RST";
+		break;
+	case 0x0002:
+		return "WDOG";
+		break;
+	case 0x0006:
+		return "JTAG";
+		break;
+	default:
+		return "unknown reset";
+	}
 }
 
 #if defined(CONFIG_DISPLAY_CPUINFO)
 int print_cpuinfo (void)
 {
-	printf("CPU:   Freescale i.MX31 rev %s at %d MHz\n",
-			get_cpu_rev(), mx31_get_mcu_main_clk() / 1000000);
+	u32 srev = get_cpu_rev();
+
+	printf("CPU:   Freescale i.MX31 rev %d.%d%s at %d MHz.",
+			(srev & 0xF0) >> 4, (srev & 0x0F),
+			((srev & 0x8000) ? " unknown" : ""),
+			mx31_get_mcu_main_clk() / 1000000);
+	printf("Reset cause: %s\n", get_reset_cause());
 	return 0;
 }
 #endif