X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=README;h=9a81de300b266544fcad17c7f67bd40a10f9cfb2;hb=c0ad62c5f7535bf13b24aab103356f827f40d0cd;hp=495c1ae3549e208a5166090e76187af1b2729fde;hpb=a85a8e63c5cf8ccb3905eb5982bf8bdcb2978557;p=platform%2Fkernel%2Fu-boot.git diff --git a/README b/README index 495c1ae..9a81de3 100644 --- a/README +++ b/README @@ -300,7 +300,6 @@ board_init_r(): - loads U-Boot or (in falcon mode) Linux - Configuration Options: ---------------------- @@ -465,10 +464,6 @@ The following options need to be configured: Board config to use DDR3L. It can be enabled for SoCs with DDR3L controllers. - CONFIG_SYS_FSL_DDR4 - Board config to use DDR4. It can be enabled for SoCs with - DDR4 controllers. - CONFIG_SYS_FSL_IFC_BE Defines the IFC controller register space as Big Endian @@ -481,15 +476,6 @@ The following options need to be configured: CONFIG_SYS_FSL_LBC_CLK_DIV Defines divider of platform clock(clock input to eLBC controller). - CONFIG_SYS_FSL_PBL_PBI - It enables addition of RCW (Power on reset configuration) in built image. - Please refer doc/README.pblimage for more details - - CONFIG_SYS_FSL_PBL_RCW - It adds PBI(pre-boot instructions) commands in u-boot build image. - PBI commands can be used to configure SoC before it starts the execution. - Please refer doc/README.pblimage for more details - CONFIG_SYS_FSL_DDR_BE Defines the DDR controller register space as Big Endian @@ -599,16 +585,6 @@ The following options need to be configured: crash. This is needed for buggy hardware (uc101) where no pull down resistor is connected to the signal IDE5V_DD7. - CONFIG_MACH_TYPE [relevant for ARM only][mandatory] - - This setting is mandatory for all boards that have only one - machine type and must be used to specify the machine type - number as it appears in the ARM machine registry - (see https://www.arm.linux.org.uk/developer/machines/). - Only boards that have multiple machine types supported - in a single configuration file and the machine type is - runtime discoverable, do not have to use this setting. - - vxWorks boot parameters: bootvx constructs a valid bootline using the following @@ -671,11 +647,6 @@ The following options need to be configured: time on others. This setting #define's the initial value of the "loads_echo" environment variable. -- Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined) - CONFIG_KGDB_BAUDRATE - Select one of the baudrates listed in - CONFIG_SYS_BAUDRATE_TABLE, see below. - - Removal of commands If no commands are needed to boot, you can disable CONFIG_CMDLINE to remove them. In this case, the command line @@ -879,17 +850,6 @@ The following options need to be configured: Support for National dp8382[01] gigabit chips. - NETWORK Support (other): - - CONFIG_DRIVER_AT91EMAC - Support for AT91RM9200 EMAC. - - CONFIG_RMII - Define this to use reduced MII inteface - - CONFIG_DRIVER_AT91EMAC_QUIET - If this defined, the driver is quiet. - The driver doen't show link status messages. - CONFIG_CALXEDA_XGMAC Support for the Calxeda XGMAC device @@ -2654,9 +2614,6 @@ Low Level (hardware related) configuration options: CONFIG_SYS_OR3_PRELIM, CONFIG_SYS_BR3_PRELIM: Memory Controller Definitions: BR2/3 and OR2/3 (SDRAM) -- CONFIG_PCI_INDIRECT_BRIDGE: - Enable support for indirect PCI bridges. - - CONFIG_SYS_SRIO: Chip has SRIO or not @@ -2754,22 +2711,6 @@ Low Level (hardware related) configuration options: This only takes effect if the memory commands are activated globally (CONFIG_CMD_MEMORY). -- CONFIG_SKIP_LOWLEVEL_INIT - [ARM, NDS32, MIPS, RISC-V only] If this variable is defined, then certain - low level initializations (like setting up the memory - controller) are omitted and/or U-Boot does not - relocate itself into RAM. - - Normally this variable MUST NOT be defined. The only - exception is when U-Boot is loaded (to RAM) by some - other boot loader or by a debugger which performs - these initializations itself. - -- CONFIG_SKIP_LOWLEVEL_INIT_ONLY - [ARM926EJ-S only] This allows just the call to lowlevel_init() - to be skipped. The normal CP15 init (such as enabling the - instruction cache) is still performed. - - CONFIG_SPL_BUILD Set when the currently-running compilation is for an artifact that will end up in the SPL (as opposed to the TPL or U-Boot