X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=README;h=6b6f7227336a1fff884e755ed59cdebdec371881;hb=be0789a8ee024e685f070dbd8c58736ea3891654;hp=f3304229d8d22e72664fd9f3318379a37631cf5d;hpb=bfef72e4dd1c1d6dfc680867bf24a78597ab0438;p=platform%2Fkernel%2Fu-boot.git diff --git a/README b/README index f330422..6b6f722 100644 --- a/README +++ b/README @@ -166,27 +166,6 @@ Directory Hierarchy: Software Configuration: ======================= -Configuration is usually done using C preprocessor defines; the -rationale behind that is to avoid dead code whenever possible. - -There are two classes of configuration variables: - -* Configuration _OPTIONS_: - These are selectable by the user and have names beginning with - "CONFIG_". - -* Configuration _SETTINGS_: - These depend on the hardware etc. and should not be meddled with if - you don't know what you're doing; they have names beginning with - "CONFIG_SYS_". - -Previously, all configuration was done by hand, which involved creating -symbolic links and editing configuration files manually. More recently, -U-Boot has added the Kbuild infrastructure used by the Linux kernel, -allowing you to use the "make menuconfig" command to configure your -build. - - Selection of Processor Architecture and Board Type: --------------------------------------------------- @@ -371,10 +350,6 @@ The following options need to be configured: In this mode, a single differential clock is used to supply clocks to the sysclock, ddrclock and usbclock. - CONFIG_SYS_CPC_REINIT_F - This CONFIG is defined when the CPC is configured as SRAM at the - time of U-Boot entry and is required to be re-initialized. - - Generic CPU options: CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN @@ -388,10 +363,6 @@ The following options need to be configured: CONFIG_SYS_FSL_DDR_ADDR Freescale DDR memory-mapped register base. - CONFIG_SYS_FSL_DDR_EMU - Specify emulator support for DDR. Some DDR features such as - deskew training are not available. - CONFIG_SYS_FSL_DDRC_GEN1 Freescale DDR1 controller. @@ -425,12 +396,6 @@ The following options need to be configured: Board config to use DDR3L. It can be enabled for SoCs with DDR3L controllers. - CONFIG_SYS_FSL_IFC_BE - Defines the IFC controller register space as Big Endian - - CONFIG_SYS_FSL_IFC_LE - Defines the IFC controller register space as Little Endian - CONFIG_SYS_FSL_IFC_CLK_DIV Defines divider of platform clock(clock input to IFC controller). @@ -448,11 +413,6 @@ The following options need to be configured: same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But it could be different for ARM SoCs. - CONFIG_SYS_FSL_DDR_INTLV_256B - DDR controller interleaving on 256-byte. This is a special - interleaving mode, handled by Dickens for Freescale layerscape - SoCs with ARM core. - CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS Number of controllers used as main memory. @@ -664,18 +624,6 @@ The following options need to be configured: CONFIG_SCSI) you must configure support for at least one non-MTD partition type as well. -- LBA48 Support - CONFIG_LBA48 - - Set this to enable support for disks larger than 137GB - Also look at CONFIG_SYS_64BIT_LBA. - Whithout these , LBA48 support uses 32bit variables and will 'only' - support disks up to 2.1TB. - - CONFIG_SYS_64BIT_LBA: - When enabled, makes the IDE subsystem use 64bit sector addresses. - Default is 32bit. - - NETWORK Support (PCI): CONFIG_E1000_SPI Utility code for direct access to the SPI bus on Intel 8257x. @@ -793,9 +741,6 @@ The following options need to be configured: Supported are USB Keyboards and USB Floppy drives (TEAC FD-05PUB). - CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the - txfilltuning field in the EHCI controller on reset. - CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2 HW module registers. @@ -869,13 +814,6 @@ The following options need to be configured: the appropriate value in Hz. - MMC Support: - The MMC controller on the Intel PXA is supported. To - enable this define CONFIG_MMC. The MMC can be - accessed from the boot prompt by mapping the device - to physical memory similar to flash. Command line is - enabled with CONFIG_CMD_MMC. The MMC driver also works with - the FAT fs. This is enabled with CONFIG_CMD_FAT. - CONFIG_SH_MMCIF Support for Renesas on-chip MMCIF controller @@ -1321,11 +1259,6 @@ The following options need to be configured: will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1 - CONFIG_SYS_SPD_BUS_NUM - - If defined, then this indicates the I2C bus number for DDR SPD. - If not defined, then U-Boot assumes that SPD is on I2C bus 0. - CONFIG_SYS_RTC_BUS_NUM If defined, then this indicates the I2C bus number for the RTC. @@ -1365,14 +1298,6 @@ The following options need to be configured: Enables support for FPGA family. (SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX) - CONFIG_FPGA_COUNT - - Specify the number of FPGA devices to support. - - CONFIG_SYS_FPGA_PROG_FEEDBACK - - Enable printing of hash marks during FPGA configuration. - CONFIG_SYS_FPGA_CHECK_BUSY Enable checks on FPGA configuration interface busy @@ -1385,9 +1310,6 @@ The following options need to be configured: If defined, a function that provides delays in the FPGA configuration driver. - CONFIG_SYS_FPGA_CHECK_CTRLC - Allow Control-C to interrupt FPGA configuration - CONFIG_SYS_FPGA_CHECK_ERROR Check for configuration errors during FPGA bitfile @@ -1537,20 +1459,6 @@ The following options need to be configured: overwriting the architecture dependent default settings. -- Frame Buffer Address: - CONFIG_FB_ADDR - - Define CONFIG_FB_ADDR if you want to use specific - address for frame buffer. This is typically the case - when using a graphics controller has separate video - memory. U-Boot will then place the frame buffer at - the given address instead of dynamically reserving it - in system RAM by calling lcd_setmem(), which grabs - the memory for the frame buffer depending on the - configured panel size. - - Please see board_init_f function. - - Automatic software updates via TFTP server CONFIG_UPDATE_TFTP CONFIG_UPDATE_TFTP_CNT_MAX @@ -1789,12 +1697,6 @@ Configuration Settings: Non-cached memory is only supported on 32-bit ARM at present. -- CONFIG_SYS_BOOTM_LEN: - Normally compressed uImages are limited to an - uncompressed size of 8 MBytes. If this is not enough, - you can define CONFIG_SYS_BOOTM_LEN in your board config file - to adjust this setting to your needs. - - CONFIG_SYS_BOOTMAPSZ: Maximum size of memory mapped by the startup code of the Linux kernel; all data that must be processed by @@ -1807,11 +1709,6 @@ Configuration Settings: CONFIG_SYS_BOOTMAPSZ. If CONFIG_SYS_BOOTMAPSZ is undefined, then the value in "bootm_size" will be used instead. -- CONFIG_SYS_BOOT_RAMDISK_HIGH: - Enable initrd_high functionality. If defined then the - initrd_high feature is enabled and the bootm ramdisk subcommand - is enabled. - - CONFIG_SYS_BOOT_GET_CMDLINE: Enables allocating and saving kernel cmdline in space between "bootm_low" and "bootm_low" + BOOTMAPSZ. @@ -1820,38 +1717,10 @@ Configuration Settings: Enables allocating and saving a kernel copy of the bd_info in space between "bootm_low" and "bootm_low" + BOOTMAPSZ. -- CONFIG_SYS_MAX_FLASH_SECT: - Max number of sectors on a Flash chip - -- CONFIG_SYS_FLASH_ERASE_TOUT: - Timeout for Flash erase operations (in ms) - -- CONFIG_SYS_FLASH_WRITE_TOUT: - Timeout for Flash write operations (in ms) - -- CONFIG_SYS_FLASH_LOCK_TOUT - Timeout for Flash set sector lock bit operation (in ms) - -- CONFIG_SYS_FLASH_UNLOCK_TOUT - Timeout for Flash clear lock bits operation (in ms) - - CONFIG_SYS_FLASH_PROTECTION If defined, hardware flash sectors protection is used instead of U-Boot software protection. -- CONFIG_SYS_DIRECT_FLASH_TFTP: - - Enable TFTP transfers directly to flash memory; - without this option such a download has to be - performed in two steps: (1) download to RAM, and (2) - copy from RAM to flash. - - The two-step approach is usually more reliable, since - you can check if the download worked before you erase - the flash, but in some situations (when system RAM is - too limited to allow for a temporary copy of the - downloaded image) this option may be very useful. - - CONFIG_SYS_FLASH_CFI: Define if the flash driver uses extra elements in the common flash structure for storing flash geometry. @@ -1872,12 +1741,6 @@ Configuration Settings: s29ws-n MirrorBit flash has non-standard addresses for buffered write commands. -- CONFIG_SYS_FLASH_QUIET_TEST - If this option is defined, the common CFI flash doesn't - print it's warning upon not recognized FLASH banks. This - is useful, if some of the configured banks are only - optionally available. - - CONFIG_FLASH_SHOW_PROGRESS If defined (must be an integer), print out countdown digits and dots. Recommended value: 45 (9..1) for 80 @@ -1892,14 +1755,6 @@ Configuration Settings: while unprotecting/erasing/programming. Please only enable this option if you really know what you are doing. -- CONFIG_ENV_MAX_ENTRIES - - Maximum number of entries in the hash table that is used - internally to store the environment settings. The default - setting is supposed to be generous and should work in most - cases. This setting can be used to tune behaviour; see - lib/hashtable.c for details. - - CONFIG_ENV_FLAGS_LIST_DEFAULT - CONFIG_ENV_FLAGS_LIST_STATIC Enable validation of the values given to environment variables when @@ -2115,12 +1970,6 @@ Low Level (hardware related) configuration options: one, specify here. Note that the value must resolve to something your driver can deal with. -- CONFIG_SYS_DDR_RAW_TIMING - Get DDR timing information from other than SPD. Common with - soldered DDR chips onboard without SPD. DDR raw timing - parameters are extracted from datasheet and hard-coded into - header files or board specific files. - - CONFIG_FSL_DDR_INTERACTIVE Enable interactive DDR debugging. See doc/README.fsl-ddr. @@ -2130,10 +1979,6 @@ Low Level (hardware related) configuration options: - CONFIG_FSL_DDR_BIST Enable built-in memory test for Freescale DDR controllers. -- CONFIG_SYS_83XX_DDR_USES_CS0 - Only for 83xx systems. If specified, then DDR should - be configured using CS0 and CS1 instead of CS2 and CS3. - - CONFIG_RMII Enable RMII mode for all FECs. Note that this is a global option, we can't @@ -2179,11 +2024,6 @@ Low Level (hardware related) configuration options: proper). Code that needs stage-specific behavior should check this. -- CONFIG_SYS_MPC85XX_NO_RESETVEC - Only for 85xx systems. If this variable is specified, the section - .resetvec is not kept and the section .bootpg is placed in the - previous 4k of the .text section. - - CONFIG_ARCH_MAP_SYSMEM Generally U-Boot (and in particular the md command) uses effective address. It is therefore not necessary to regard