X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=CHANGELOG;h=80984bb1c5120b4bdd67c859006cf013528f5365;hb=2a8dfe08359a1b663418b2faa1da1d7bce34d302;hp=ff386c9c3a09921b1542d25f7ea9b2d739044be5;hpb=f8db84f132b1e335f20f96138a1f09ed97b08664;p=platform%2Fkernel%2Fu-boot.git diff --git a/CHANGELOG b/CHANGELOG index ff386c9..80984bb 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -1,3 +1,1131 @@ +commit e6615ecf4eaf4dd52696934aed8f5c6474cfd286 +Author: Stefan Roese +Date: Wed Mar 21 14:54:29 2007 +0100 + + ppc4xx: Fix file mode of include/configs/acadia.h + + Signed-off-by: Stefan Roese + +commit d5f4614c9350d9333e575100fb250aab774d0258 +Author: Markus Klotzbuecher +Date: Wed Mar 21 14:41:46 2007 +0100 + + SPC1920: fix small clock routing bug + + Signed-off-by: Markus Klotzbuecher + +commit 16c0cc1c82081a493ab87c51980b28336ce1bce8 +Author: Stefan Roese +Date: Wed Mar 21 13:39:57 2007 +0100 + + [PATCH] Add AMCC Acadia (405EZ) eval board support + + This patch adds support for the new AMCC Acadia eval board. + + Please note that this Acadia/405EZ support is still in a beta stage. + Still lot's of cleanup needed but we need a preliminary release now. + + Signed-off-by: Stefan Roese + +commit e01bd218b00af73499331a1a701625a852cd286f +Author: Stefan Roese +Date: Wed Mar 21 13:38:59 2007 +0100 + + [PATCH] Add AMCC PPC405EZ support + + This patch adds support for the new AMCC 405EZ PPC. It is in + preparation for the AMCC Acadia board support. + + Please note that this Acadia/405EZ support is still in a beta stage. + Still lot's of cleanup needed but we need a preliminary release now. + + Signed-off-by: Stefan Roese + +commit 07e82cb2e284a893df6693f2a1337ab2c47bf6a1 +Author: Heiko Schocher +Date: Wed Mar 21 08:45:17 2007 +0100 + + [PATCH] TQM8272: dont change the bits given from the HRCW + for the SIUMCR and BCR Register. + Fix the calculation for the EEprom Size + + Signed-off-by: Heiko Schocher + +commit 389b6bb50f745bf5038ce030300d8a8512e96f79 +Author: Wolfgang Denk +Date: Mon Mar 19 13:10:08 2007 +0100 + + Remove obsoleted POST files. + + Signed-off-by: Wolfgang Denk + +commit 8423e5e31a7235d05a482627315fb11d49c17bd7 +Author: Stefan Roese +Date: Fri Mar 16 21:11:42 2007 +0100 + + [PATCH] Use dynamic SDRAM TLB setup on AMCC Ebony eval board + + Define CONFIG_PROG_SDRAM_TLB so that the TLB entries for the + DDR memory are dynamically programmed matching the total size + of the equipped memory (DIMM modules). + + Signed-off-by: Stefan Roese + +commit 76d1466f918b881cda2d259254761e73885093c2 +Author: Matthias Fuchs +Date: Tue Mar 13 13:38:05 2007 +0100 + + [PATCH] renamed environment variable 'addcon' to 'addcons' for PCI405 + boards in terms of unification. + + Signed-off-by: Matthias Fuchs + +commit a7090b993d3d4d2221ac3f33e6cb1d1b2ccc6bf0 +Author: Wolfgang Denk +Date: Tue Mar 13 16:05:55 2007 +0100 + + Make SC3 board build with 'make O='; use 'addcons' consistently + (SC3 and Jupiter used to use 'addcon' instead). + + Signed-off-by: Wolfgang Denk wd@denx.de + +commit 8502e30a28e492c756ea2d7df0ace026388fce4b +Author: Heiko Schocher +Date: Tue Mar 13 09:40:59 2007 +0100 + + [PATCH] update board config for jupiter Board: + added Hush Shell, + CONFIG_CMDLINE_EDITING, + CFG_ENV_ADDR_REDUND activated + + Signed-off-by: Heiko Schocher + +commit 992423ab43c2bcf6b704853bd00af77450915e20 +Author: Stefan Roese +Date: Thu Mar 8 23:00:08 2007 +0100 + + ppc4xx: Fix file mode of sequoia.c + + Signed-off-by: Stefan Roese + +commit eb92f613556800f7483666db09d9a237ad911d4a +Author: Wolfgang Denk +Date: Thu Mar 8 22:52:51 2007 +0100 + + Minor cleanup. + +commit 8ce16f55c7b9752af3d8bed84521aec5337e2de1 +Author: John Otken john@softadvances.com +Date: Thu Mar 8 09:39:48 2007 -0600 + + ppc4xx: Clear Sequoia/Rainier security engine reset bits + + Signed-off-by: John Otken john@softadvances.com + +commit 650a330dd2539130c8c324791e2f9f75aed79d4e +Author: Matthias Fuchs +Date: Thu Mar 8 16:26:52 2007 +0100 + + [PATCH] I2C: add some more SPD eeprom decoding for DDR2 modules + + Signed-off-by: Matthias Fuchs + +commit d9fc703246840c4b268debf48c334ba55c597dc0 +Author: Matthias Fuchs +Date: Thu Mar 8 16:25:47 2007 +0100 + + [PATCH] I2C: disable flat i2c commands when CONFIG_I2C_CMD_TREE is defined + + Signed-off-by: Matthias Fuchs + +commit ced5b9029043397348cdc88e0cfcd6b1f629250b +Author: Matthias Fuchs +Date: Thu Mar 8 16:23:11 2007 +0100 + + [PATCH] 4xx: allow CONFIG_I2C_CMD_TREE without CONFIG_I2C_MULTI_BUS + + Signed-off-by: Matthias Fuchs + +commit d8a8ea5c476d37006fc7f85b7f903142795c8b14 +Author: Matthias Fuchs +Date: Thu Mar 8 16:20:32 2007 +0100 + + [PATCH] I2C: Add missing default CFG_SPD_BUS_NUM + + Signed-off-by: Matthias Fuchs + +commit f9fc6a5852a6335840882fa2111925010eea1abe +Author: Matthias Fuchs +Date: Wed Mar 7 15:32:01 2007 +0100 + + fixed ethernet phy configuration for plu405 board + + Signed-off-by: Matthias Fuchs + +commit 769104c9356594deb2092e204a39c05b33202d6c +Author: Wolfgang Denk +Date: Thu Mar 8 21:49:27 2007 +0100 + + Minor cleanup + +commit 00cdb4ce5e1b42248e7e6522ad0da3421b988afa +Author: Stefan Roese +Date: Thu Mar 8 10:13:16 2007 +0100 + + [PATCH] Update AMCC Luan 440SP eval board support + + The AMCC Luan now uses the common 440SP(e) DDR SPD code for DDR + inititializition. This includes DDR auto calibration and support + for different DIMM modules, instead of the fixed setup used in + the earlier version. + + This patch also enables the cache in FLASH for the startup + phase of U-Boot (while running from FLASH). After relocating to + SDRAM the cache is disabled again. This will speed up the boot + process, especially the SDRAM setup, since there are some loops + for memory testing (auto calibration). + + Signed-off-by: Stefan Roese + +commit 2f5df47351910a2936c7741cf111855829200943 +Author: Stefan Roese +Date: Thu Mar 8 10:10:18 2007 +0100 + + [PATCH] Update AMCC Yucca 440SPe eval board support + + The AMCC Yucca now uses the common 440SP(e) DDR SPD code for DDR + inititializition. This includes DDR auto calibration and support + for different DIMM modules, instead of the fixed setup used in + the earlier version. + + Signed-off-by: Stefan Roese + +commit 2721a68a9ea91f1e494649ce68b2577261f578e2 +Author: Stefan Roese +Date: Thu Mar 8 10:07:18 2007 +0100 + + ppc4xx: Small AMCC Katmai 440SPe update + + Signed-off-by: Stefan Roese + +commit df294497479b1dca6dd86318b2a912f72fede0df +Author: Stefan Roese +Date: Thu Mar 8 10:06:09 2007 +0100 + + ppc4xx: Update 440SP/440SPe DDR SPD setup code to support 440SP + + Signed-off-by: Stefan Roese + +commit fa1aef15bcd47736687be1af544506e90fba545d +Author: Stefan Roese +Date: Wed Mar 7 16:43:00 2007 +0100 + + [PATCH] Use dynamic SDRAM TLB setup on AMCC Ocotea eval board + + Define CONFIG_PROG_SDRAM_TLB so that the TLB entries for the + DDR memory are dynamically programmed matching the total size + of the equipped memory (DIMM modules). + + Signed-off-by: Stefan Roese + +commit e2ebe696818939e2b974628be9c921ea3fe9de13 +Author: Stefan Roese +Date: Wed Mar 7 16:39:36 2007 +0100 + + [PATCH] Fix AMCC 44x SPD SDRAM init code to support 2 DIMM's + + This patch fixes a problem that occurs when 2 DIMM's are + used. This problem was first spotted and fixed by Gerald Jackson + but this patch fixes the + problem in a little more clever way. + + This patch also adds the nice functionality to dynamically + create the TLB entries for the SDRAM (tlb.c). So we should + never run into such problems with wrong (too short) TLB + initialization again on these platforms. + + As this feature is new to the "old" 44x SPD DDR driver, it + has to be enabled via the CONFIG_PROG_SDRAM_TLB define. + + Signed-off-by: Stefan Roese + +commit 39218433983417b9df087976a79e3f80dd5e83d6 +Author: Wolfgang Denk +Date: Wed Mar 7 16:33:44 2007 +0100 + + UC101: fix compiler warnings + +commit 8d7e2732221bc2d64df14f700c64c23e0a4c3dce +Author: Wolfgang Denk +Date: Wed Mar 7 16:19:46 2007 +0100 + + HMI1001: fix build error, cleanup compiler warnings. + +commit ad5bb451ade552c44bef9119d907929ebc2c126f +Author: Wolfgang Denk +Date: Tue Mar 6 18:08:43 2007 +0100 + + Restructure POST directory to support of other CPUs, boards, etc. + +commit a5284efd125967675b2e9c6ef7b95832268ad360 +Author: Wolfgang Denk +Date: Tue Mar 6 18:01:47 2007 +0100 + + Fix HOSTARCH handling. + Patch by Mike Frysinger, Mar 05 2007 + +commit 07b7b0037aac5102939917d7cbe561b5c0d5aa44 +Author: Stefan Roese +Date: Tue Mar 6 07:47:04 2007 +0100 + + [PATCH] Speed optimization of AMCC Sequoia/Rainier DDR2 setup + + As provided by the AMCC applications team, this patch optimizes the + DDR2 setup for 166MHz bus speed. The values provided are also save + to use on a "normal" 133MHz PLB bus system. Only the refresh counter + setup has to be adjusted as done in this patch. + + For this the NAND booting version had to include the "speed.c" file + from the cpu/ppc4xx directory. With this addition the NAND SPL image + will just fit into the 4kbytes of program space. gcc version 4.x as + provided with ELDK 4.x is needed to generate this optimized code. + + Signed-off-by: Stefan Roese + +commit 781e026c8aa6f7e9eb5f0e72cc4d20971219b148 +Author: Kim Phillips +Date: Wed Feb 28 00:02:04 2007 -0600 + + mpc83xx: fix implicit declaration of function 'ft_get_prop' warnings + + (cherry picked from c5bf13b02284c3204a723566a9bab700e5059659 commit) + +commit 4feab4de7bfc2cb2fed36ad76f93c3a69659bbaf +Author: Kumar Gala +Date: Tue Feb 27 23:51:42 2007 -0600 + + mpc83xx: Fix config of Arbiter, System Priority, and Clock Mode + + The config value for: + * CFG_ACR_PIPE_DEP + * CFG_ACR_RPTCNT + * CFG_SPCR_TSEC1EP + * CFG_SPCR_TSEC2EP + * CFG_SCCR_TSEC1CM + * CFG_SCCR_TSEC2CM + + Were not being used when setting the appropriate register + + Added: + * CFG_SCCR_USBMPHCM + * CFG_SCCR_USBDRCM + * CFG_SCCR_PCICM + * CFG_SCCR_ENCCM + + To allow full config of the SCCR. + + Also removed random CFG_SCCR settings in MPC8349EMDS, TQM834x, and sbc8349 + that were just bogus. + + Signed-off-by: Kumar Gala + +commit d51b3cf371cd441030460ef19d36b2924c361b1a +Author: Kim Phillips +Date: Thu Feb 22 20:06:57 2007 -0600 + + mpc83xx: update [local-]mac-address properties on UEC based devices + + 8360 and 832x weren't updating their [local-]mac-address + properties. This patch fixes that. + + Signed-off-by: Kim Phillips + +commit 61f4f912acbe60776c5e00df1ec94094ce672957 +Author: Timur Tabi +Date: Tue Feb 13 10:41:42 2007 -0600 + + mpc83xx: write MAC address to mac-address and local-mac-address + + Some device trees have a mac-address property, some have local-mac-address, + and some have both. To support all of these device trees, this patch + updates ftp_cpu_setup() to write the MAC address to mac-address if it exists. + This function already updates local-mac-address. + + Signed-off-by: Timur Tabi + +commit 22d71a71f57fd5d38b27ac3848e50d790360a598 +Author: Kim Phillips +Date: Tue Feb 27 18:41:08 2007 -0600 + + mpc83xx: add command line editing by default + +commit 3fc0bd159103b536e1c54c6f4457a09b3aba66ca +Author: Kim Phillips +Date: Wed Feb 14 19:50:53 2007 -0600 + + mpc83xx: Disable G1TXCLK, G2TXCLK h/w buffers + + Disable G1TXCLK, G2TXCLK h/w buffers. This patch + fixes a networking timeout issue with MPC8360EA (Rev.2) PBs. + + Verified on Rev. 1.1, Rev. 1.2, and Rev. 2.0 boards. + + Signed-off-by: Kim Phillips + Signed-off-by: Emilian Medve + +commit d61853cf2472e0b8bcbd131461a93d1c49ff0c1f +Author: Xie Xiaobo +Date: Wed Feb 14 18:27:17 2007 +0800 + + mpc83xx: Add DDR2 controller fixed/SPD Init for MPC83xx + + The code supply fixed and SPD initialization for MPC83xx DDR2 Controller. + it pass DDR/DDR2 compliance tests. + + Signed-off-by: Xie Xiaobo + +commit b110f40bd180c6b560276589beedf753e97c46ce +Author: Xie Xiaobo +Date: Wed Feb 14 18:27:06 2007 +0800 + + mpc83xx: Add the cpu specific code for MPC8360E rev2.0 MDS + + MPC8360E rev2.0 have new spridr,and PVR value, + The MDS board for MPC8360E rev2.0 has 32M bytes Flash and 256M DDR2 DIMM. + + Signed-off-by: Xie Xiaobo + +commit 8d172c0f0d85998a256a95b7459a5403a30380ed +Author: Xie Xiaobo +Date: Wed Feb 14 18:26:44 2007 +0800 + + mpc83xx: Add the cpu and board specific code for MPC8349E rev3.1 MDS + + MPC8349E rev3.1 have new spridr,and PVR value, + The MDS board for MPC8349E rev3.1 has 32M bytes Flash and 256M DDR2 DIMM. + + Signed-off-by: Xie Xiaobo + +commit f6f5f709e5c8e4564c4dfeecfdf2279244f9c83b +Author: Joakim Tjernlund +Date: Wed Jan 31 11:04:19 2007 +0100 + + mpc83xx: Fix empty i2c reads/writes in fsl_i2c.c + + Fix empty i2c reads/writes, i2c_write(0x50, 0x00, 0, NULL, 0) + which is used to se if an slave will ACK after receiving its address. + + Correct i2c probing to use this method as the old method could upset + a slave as it wrote a data byte to it. + + Add a small delay in i2c_init() to let the controller + shutdown any ongoing I2C activity. + + Signed-off-by: Joakim Tjernlund + +commit 7a78f148d6a7298e4fface680dc7eacd877b1aba +Author: Timur Tabi +Date: Wed Jan 31 15:54:29 2007 -0600 + + mpc83xx: Add support for the MPC8349E-mITX-GP + + Add support for the MPC8349E-mITX-GP, a stripped-down version of the + MPC8349E-mITX. Bonus features include support for low-boot (BMS bit in + HRCW is 0) for the ITX and a README for the ITX and the ITX-GP. + + Signed-off-by: Timur Tabi + +commit fab16807adad350f618024350c6950165c247c72 +Author: Timur Tabi +Date: Wed Jan 31 15:54:20 2007 -0600 + + mpc83xx: Delete sdram_init() for MPC8349E-mITX + + There is no SDRAM on any of the 8349 ITX variants, so function sdram_init() + never does anything. This patch deletes it. + + Signed-off-by: Timur Tabi + +commit a87c856eb411b9365937d0d4b9c21e46adbe1c14 +Author: Dave Liu +Date: Fri Jan 19 10:43:26 2007 +0800 + + mpc83xx: Fix the LAW1/3 bug + + The patch solves the alignment problem of the local bus access windows to + render accessible the memory bank and PHY registers of UPC 1 (starting at + 0xf801 0000). What we actually did was to adjust the sizes of the bus + access windows so that the base address alignment requirement would be met. + + Signed-off-by: Chereji Marian + Signed-off-by: Gridish Shlomi + Signed-off-by: Dave Liu + +commit 97c4b397dce236a7318b304667bf89e59d08b17c +Author: Kim Phillips +Date: Tue Jan 30 16:15:31 2007 -0600 + + mpc83xx: don't hang if watchdog configured on 8360, 832x + + don't hang if watchdog configured on 8360, 832x + + The watchdog programming model is the same across all 83xx devices; + make the code reflect that. + +commit b70047478570e371ce7223be342ce98afea0f7d6 +Author: Kim Phillips +Date: Tue Jan 30 16:15:21 2007 -0600 + + mpc83xx: protect memcpy to bad address if a local-mac-address is missing from dt + + protect memcpy to bad address if a local-mac-address is missing from dt + +commit 6752ed088c75c26a89b70c46b7326a4cd6015f29 +Author: Kim Phillips +Date: Tue Jan 30 16:15:04 2007 -0600 + + mpc83xx: make 8360 default environment fdt be 8360 (not 8349) + + make 8360 default environment fdt be 8360 (not 8349) + +commit a28899c910024a0226331df07207b1038c300c93 +Author: Emilian Medve +Date: Tue Jan 30 16:14:50 2007 -0600 + + mpc83xx: Fix alternating tx error / tx buffer not ready bug in QE UEC + + The problem is not gcc4 but the code itself. The BD_STATUS() macro can't + be used for busy-waiting since it strips the 'volatile' property from + the bd variable. gcc3 was working by pure luck. + + This is a follow on patch to "Fix the UEC driver bug of QE" + +commit 3e78a31cfe3d3022f46f67eb88e1281d5cc2eb89 +Author: Kumar Gala +Date: Tue Jan 30 14:08:30 2007 -0600 + + mpc83xx: Replace CONFIG_MPC8349 and use CONFIG_MPC834X instead + + The code that is ifdef'd with CONFIG_MPC8349 is actually applicable to all + MPC834X class processors. Change the protections from CONFIG_MPC8349 to + CONFIG_MPC834X so they are more generic. + + Signed-off-by: Kumar Gala + +commit ae246dc6c1937c291014eadd90b6d48c438c7cb0 +Author: Kim Phillips +Date: Thu Jan 25 13:40:55 2007 -0600 + + mpc83xx: add MPC832XEMDS and sbc8349 to MAKEALL + +commit 4decd84e8f04279c5cfff7f8e907465ef8d8a3fb +Author: Kim Phillips +Date: Wed Jan 24 17:18:37 2007 -0600 + + mpc83xx: sort Makefile targets + + reordered targets alphabetically + +commit 91e25769771c1164ed63ffca0add49f934ae3343 +Author: Paul Gortmaker +Date: Tue Jan 16 11:38:14 2007 -0500 + + mpc83xx: U-Boot support for Wind River SBC8349 + + I've redone the SBC8349 support to match git-current, which + incorporates all the MPC834x updates from Freescale since the 1.1.6 + release, including the DDR changes. + + I've kept all the SBC8349 files as parallel as possible to the + MPC8349EMDS ones for ease of maintenance and to allow for easy + inspection of what was changed to support this board. Hence the SBC8349 + U-Boot has FDT support and everything else that the MPC8349EMDS has. + + Fortunately the Freescale updates added support for boards using CS0, + but I had to change spd_sdram.c to allow for board specific settings for + the sdram_clk_cntl (it is/was hard coded to zero, and that remains the + default if the board doesn't specify a value.) + + Hopefully this should be mergeable as-is and require no whitespace + cleanups or similar, but if something doesn't measure up then let me + know and I'll fix it. + + Thanks, + Paul. + +commit 05031db456ab227f3e3752f37b9b812b65bb83ad +Author: Sam Song +Date: Thu Dec 14 19:03:21 2006 +0800 + + mpc83xx: Remove a redundant semicolon in mpc8349itx.c + + A redundant semicolon existed in mpc8349itx.c + should be removed. + + Signed-off-by: Sam Song + +commit f35f358241c549be3f75cfe2eaa642914275b7ba +Author: Jerry Van Baren +Date: Wed Dec 6 21:23:55 2006 -0500 + + mpc83xx: Put the version (and magic) after the HRCW. + + Put the version (and magic) after the HRCW. This puts it in a fixed + location in flash, not at the start of flash but as close as we can get. + + Signed-off-by: Jerry Van Baren + +commit 48aecd969171a6e99a55fae04933857787f9a5bd +Author: Dave Liu +Date: Thu Dec 7 21:14:51 2006 +0800 + + mpc83xx: Add the MPC832XEMDS board readme + + Add the MPC832XEMDS board readme + + Signed-off-by: Dave Liu + +commit 24c3aca3f1358b113d3215adb5433b156e99f72b +Author: Dave Liu +Date: Thu Dec 7 21:13:15 2006 +0800 + + mpc83xx: Add support for the MPC832XEMDS board + + This patch supports DUART, ETH3/4 and PCI etc. + + Signed-off-by: Dave Liu + +commit e080313c32322e15ab5a18eb896a252858c57284 +Author: Dave Liu +Date: Thu Dec 7 21:11:58 2006 +0800 + + mpc83xx: streamline the 83xx immr head file + + For better format and style, I streamlined the 83xx head files, + including immap_83xx.h and mpc83xx.h. In the old head files, 1) + duplicated macro definition appear in the both files; 2) the structure + of QE immr is duplicated in the immap_83xx.h and immap_qe.h; 3) The + macro definition put inside the each structure. So, I cleaned up the + structure of QE immr from immap_83xx.h, deleted the duplicated stuff and + moved the macro definition to mpc83xx.h, Just like MPC8260. + + CHANGELOG + + *streamline the 83xx immr head file + + Signed-off-by: Dave Liu + +commit ddd02492f43db5408f5ab9f823b0ba5796e28ef0 +Author: Dave Liu +Date: Wed Dec 6 11:38:17 2006 +0800 + + mpc83xx: Fix the UEC driver bug of QE + + The patch prevents the GCC tool chain from striping useful code for + optimization. It will make UEC ethernet driver workable, Otherwise the + UEC will fail in tx when you are using gcc4.x. but the driver can work + when using gcc3.4.3. + + CHANGELOG + + *Prevent the GCC from striping code for optimization, Otherwise the UEC + will tx failed when you are using gcc4.x. + + Signed-off-by: Dave Liu + +commit ba58e4c9a9a917ce795dd16d4ec8d515f9f7aa35 +Author: Stefan Roese +Date: Thu Mar 1 21:11:36 2007 +0100 + + [PATCH] Update AMCC Katmai 440SPe eval board support + + This patch updates the recently added Katmai board support. The biggest + change is the support of ECC DIMM modules in the 440SP(e) SPD DDR2 + driver. + + Please note, that still some problems are left with some memory + configurations. See the driver for more details. + + Signed-off-by: Stefan Roese + +commit 8c12045a3b06c5b6675d3fe02fbc9f545988129a +Author: Stefan Roese +Date: Thu Mar 1 07:03:25 2007 +0100 + + [PATCH] I2C: Add missing default CFG_RTC_BUS_NUM & CFG_DTT_BUS_NUM + + Signed-off-by: Stefan Roese + +commit ccbc7036648e465697ca298ba51e0e76dda352a0 +Author: Wolfgang Denk +Date: Wed Feb 28 01:28:53 2007 +0100 + + SC3: fix typo in default environment + +commit e344568b1b46af85ec32d815586f91bc115d6223 +Author: Sergei Poselenov +Date: Tue Feb 27 20:15:30 2007 +0300 + + MCC200: Fixes for update procedure + + - fix logic error in image type handling + - make sure file system images (cramfs etc.) get stored in flash + with image header stripped so they can be mounted through MTD + +commit 743571145b37182757d4e688a77860b36ee77573 +Author: Wolfgang Denk +Date: Tue Feb 27 14:26:04 2007 +0100 + + Minor code cleanup. + +commit 638dd1458bbdc2a55d4b9e25c5c4e1f838a5dc72 +Author: Sergei Poselenov +Date: Tue Feb 27 12:40:16 2007 +0300 + + MCC200 update - add LCD Progress Indicator + +commit 6c7cac8c4fce0ea2bf8e15ed8658d87974155b44 +Author: Stefan Roese +Date: Thu Feb 22 07:43:34 2007 +0100 + + [PATCH] get_dev() now unconditionally uses manual relocation + + Since the relocation fix is not included yet and we're not sure how + it will be added, this patch removes code that required relocation + to be fixed for now. + + Signed-off-by: Stefan Roese + +commit 8274ec0bd01d2feb2c7f095eba78d42ea009798b +Author: Stefan Roese +Date: Thu Feb 22 07:40:23 2007 +0100 + + [PATCH] Change systemace driver to select 8 & 16bit mode + + As suggested by Grant Likely this patch enables the Xilinx SystemACE + driver to select 8 or 16bit mode upon startup. + + Signed-off-by: Stefan Roese + +commit 3a197b2fe49d6fa03978e60af2394efe9c70b527 +Author: Haiying Wang +Date: Wed Feb 21 16:52:31 2007 +0100 + + [PATCH v3] Add sync to ensure flash_write_cmd is fully finished + + Some CPUs like PPC, BLACKFIN need sync() to ensure cfi flash write command + is fully finished. The sync() is defined in each CPU's io.h file. For + those CPUs which do not need sync for now, a dummy sync() is defined in + their io.h as well. + + Signed-off-by: Haiying Wang + +commit da04995c7dc6772013a9a0dc5c767f190c402478 +Author: Stefan Roese +Date: Wed Feb 21 13:44:34 2007 +0100 + + [PATCH] Fix problem in systemace driver (ace_writew instead of ace_write) + + Signed-off-by: Stefan Roese + +commit 751bb57107d78978ae08e697c3deba816f5be091 +Author: Stefan Roese +Date: Tue Feb 20 13:21:57 2007 +0100 + + [PATCH] Fix relocation problem with "new" get_dev() function + + This patch enables the "new" get_dev() function for block devices + introduced by Grant Likely to be used on systems that still suffer + from the relocation problems (manual relocation neede because of + problems with linker script). + + Hopefully we can resolve this relocation issue soon for all platform + so we don't need this additional code anymore. + + Signed-off-by: Stefan Roese + +commit d93e2212f962668b3dce091ff5edc33f2347fe37 +Author: Stefan Roese +Date: Tue Feb 20 13:17:42 2007 +0100 + + [PATCH] Update SystemACE driver for 16bit access + + This patch removes some problems when the Xilinx SystemACE driver + is used with 16bit access on an big endian platform (like the + AMCC Katmai). + + Signed-off-by: Stefan Roese + +commit 874bb7b88fe9b4648e1288a387af2e31014a72f3 +Author: Stefan Roese +Date: Tue Feb 20 13:15:40 2007 +0100 + + [PATCH] Clean up Katmai (440SPe) linker script + + Signed-off-by: Stefan Roese + +commit 4745acaa1a603b67f6b9b7970365ebadd7d6586f +Author: Stefan Roese +Date: Tue Feb 20 10:57:08 2007 +0100 + + [PATCH] Add support for the AMCC Katmai (440SPe) eval board + + Signed-off-by: Stefan Roese + +commit 0dc018ece13effc689e47479ea9ebf1c98a507f5 +Author: Stefan Roese +Date: Tue Feb 20 10:51:26 2007 +0100 + + [PATCH] I2C: Add support for multiple I2C busses for RTC & DTT + + This patch switches to the desired I2C bus when the date/dtt + commands are called. This can be configured using the + CFG_RTC_BUS_NUM and/or CFG_DTT_BUS_NUM defines. + + Signed-off-by: Stefan Roese + +commit 4037ed3b63923cfcec27f784a89057c3cbabcedb +Author: Stefan Roese +Date: Tue Feb 20 10:43:34 2007 +0100 + + [PATCH] PPC4xx: Add 440SP(e) DDR2 SPD DIMM support + + This patch adds support for the DDR2 controller used on the + 440SP and 440SPe. It is tested on the Katmai (440SPe) eval + board and works fine with the following DIMM modules: + + - Corsair CM2X512-5400C4 (512MByte per DIMM) + - Kingston ValueRAM KVR667D2N5/512 (512MByte per DIMM) + - Kingston ValueRAM KVR667D2N5K2/2G (1GByte per DIMM) + + This patch also adds the nice functionality to dynamically + create the TLB entries for the SDRAM (tlb.c). So we should + never run into such problems with wrong (too short) TLB + initialization again on these platforms. + + Signed-off-by: Stefan Roese + +commit 36d830c9830379045f5daa9f542ac1c990c70068 +Author: Stefan Roese +Date: Tue Feb 20 10:35:42 2007 +0100 + + [PATCH] PPC4xx: Split 4xx SPD SDRAM init routines into 2 files + + Since the existing 4xx SPD SDRAM initialization routines for the + 405 SDRAM controller and the 440 DDR controller don't have much in + common this patch splits both drivers into different files. + + This is in preparation for the 440 DDR2 controller support (440SP/e). + + Signed-off-by: Stefan Roese + +commit 79b2d0bb2eae09602448f7a7cb56530d2f31e6c6 +Author: Stefan Roese +Date: Tue Feb 20 10:27:08 2007 +0100 + + [PATCH] PPC4xx: Add support for multiple I2C busses + + This patch adds support for multiple I2C busses on the PPC4xx + platforms. Define CONFIG_I2C_MULTI_BUS in the board config file + to make use of this feature. + + It also merges the 405 and 440 i2c header files into one common + file 4xx_i2c.h. + + Also the 4xx i2c reset procedure is reworked since I experienced + some problems with the first access on the 440SPe Katmai board. + + Signed-off-by: Stefan Roese + +commit eb867a76238fb38e952c37871b16d0d7fd61c95f +Author: Grant Likely +Date: Tue Feb 20 09:05:45 2007 +0100 + + [PATCH 9_9] Use "void *" not "unsigned long *" for block dev read_write buffer pointers + + Block device read/write is anonymous data; there is no need to use a + typed pointer. void * is fine. Also add a hook for block_read functions + + Signed-off-by: Grant Likely + +commit 53758fa20e935cc87eeb0519ed365df753a6f289 +Author: Grant Likely +Date: Tue Feb 20 09:05:38 2007 +0100 + + [PATCH 8_9] Add block_write hook to block_dev_desc_t + + Preparation for future patches which support block device writing + + Signed-off-by: Grant Likely + +commit f4852ebe6ca946a509667eb68be42026f837be76 +Author: Grant Likely +Date: Tue Feb 20 09:05:31 2007 +0100 + + [PATCH 7_9] Replace ace_readw_ace_writeb functions with macros + + Register read/write does not need to be wrapped in a full function. The + patch replaces them with macros. + + Signed-off-by: Grant Likely + +commit 3a8ce9af6fcb5744a7851b4440c07688acc40844 +Author: Grant Likely +Date: Tue Feb 20 09:05:23 2007 +0100 + + [PATCH 6_9] Move common_cmd_ace.c to drivers_systemace.c + + The code in this file is not a command; it is a device driver. Put it in + the correct place. There are zero functional changes in this patch, it + only moves the file. + + Signed-off-by: Grant Likely + +commit 984618f3e7794c783ec8d1511e74c6ee2d69bfe4 +Author: Grant Likely +Date: Tue Feb 20 09:05:16 2007 +0100 + + [PATCH 5_9] Whitespace fixup on common_cmd_ace.c (using Lindent) + + This patch is in preparation of additional changes to the sysace driver. + May as well take this opportunity to fixup the inconsistent whitespace since + this file is about to undergo major changes anyway. + + There are zero functional changes in this patch. It only cleans up the + the whitespace. + + Signed-off-by: Grant Likely + +commit 80ba981d940471fe7e539e64fa3d2bd80002beda +Author: Grant Likely +Date: Tue Feb 20 09:05:07 2007 +0100 + + [PATCH 4_4] Remove local implementation of isprint() in ft_build.c + + isprint is already defined in ctype.c + + Signed-off-by: Grant Likely + +commit c95c4280d751ca078c2ff58228d2f2b44ccf0600 +Author: Grant Likely +Date: Tue Feb 20 09:05:00 2007 +0100 + + [PATCH 3_9] Move buffer print code from md command to common function + + Printing a buffer is a darn useful thing. Move the buffer print code + into print_buffer() in lib_generic/ + + Signed-off-by: Grant Likely + +commit 99b0f0fd3fbf2572ae1a7723dd90cffc8e85130a +Author: Grant Likely +Date: Tue Feb 20 09:04:52 2007 +0100 + + [PATCH 2_4] Use config.h, not xparameters.h, for xilinx targets + + Change the xilinx device drivers and board code to include config.h + instead of xparameters.h directly. config.h always includes the + correct xparameters file. This change reduces the posibility of + including the wrong file when adding a new xilinx board port + + Signed-off-by: Grant Likely + +commit 735dd97b1b20e777d059c7b389fe9d70cd3f80c7 +Author: Grant Likely +Date: Tue Feb 20 09:04:34 2007 +0100 + + [PATCH 1_4] Merge common get_dev() routines for block devices + + Each of the filesystem drivers duplicate the get_dev routine. This change + merges them into a single function in part.c + + Signed-off-by: Grant Likely + +commit f5fcc3c20b65554e98a165542c36ee0c610a2d81 +Author: Wolfgang Denk +Date: Mon Feb 19 23:09:51 2007 +0100 + + MCC200: Software Updater: allow both "ramdisk" and "filesystem" types + as root file system images. + +commit 489c696ae7211218961d159e43e722d74c36fcbc +Author: Sergei Poselenov +Date: Wed Feb 14 14:30:28 2007 +0300 + + MCC200: Extensions to Software Update Mechanism + + Update / extend Software Update Mechanism for MCC200 board: + + - Add support for rootfs image added. The environment variables + "rootfs_st" and "rootfs_nd" can be used to override the default + values of the image start and end. + - Remove excessive key check code. + - Code cleanup. + +commit 4be23a12f23f1372634edc3215137b09768b7949 +Author: Stefan Roese +Date: Mon Feb 19 08:23:15 2007 +0100 + + [PATCH] Update Sequoia EBC configuration (NOR FLASH) + + As spotted by Matthias Fuchs, the READY input should not be + enabled for the NOR FLASH on the Sequoia board. + + Signed-off-by: Stefan Roese + +commit 2605e90bf676d48123afe5719a846d2b52b24aac +Author: Heiko Schocher +Date: Fri Feb 16 07:57:42 2007 +0100 + + [PATCH] Added support for the jupiter board. + + Signed-off-by: Heiko Schocher + +commit 497d012e5be0194e1084073d0081eb1a844796b2 +Author: Gary Jennejohn +Date: Mon Feb 12 13:11:50 2007 +0100 + + LPC2292: patch from Siemens. + +commit b0b1a920aebead0d44146e73676ae9d80fffc8e2 +Author: Stefan Roese +Date: Sat Feb 10 08:49:31 2007 +0100 + + [PATCH] Add missing p3mx.h file to repository (ups) + + Signed-off-by: Stefan Roese + +commit 53d4a4983fb9b3ae5f7b2f10c599aca2b1b4034a +Author: Bartlomiej Sieka +Date: Fri Feb 9 10:45:42 2007 +0100 + + [Motion-PRO] Preliminary support for the Motion-PRO board. + +commit 5a753f98c6a01bd1c61a9a3f95e8329a35f62994 +Author: Stefan Roese +Date: Wed Feb 7 16:51:08 2007 +0100 + + [PATCH] Update some AMCC 4xx board config files (set initrd_high) + + Some boards that can have more than 768MBytes of SDRAM need to + set "initrd_high", so that the initrd can be accessed by the + Linux kernel. + + Signed-off-by: Stefan Roese + +commit 7372ca68227930d03cffa548310524cad5b96733 +Author: Stefan Roese +Date: Fri Feb 2 12:44:22 2007 +0100 + + [PATCH] Correctly display PCI arbiter en-/disabled on some 4xx boards + + Previously the strapping DCR/SDR was read to determine if the internal PCI + arbiter is enabled or not. This strapping bit can be overridden, so now + the current status is read from the correct DCR/SDR register. + + Signed-off-by: Stefan Roese + +commit 2aa54f651a42d198673318f07a20c89a43e4d197 +Author: Stefan Roese +Date: Fri Feb 2 12:42:08 2007 +0100 + + [PATCH] Change configuration output of Sycamore, Yellowstone & Rainier + + Signed-off-by: Stefan Roese + +commit 23744d6b5bf17592eb6a0ef4f318f6089f55993b +Author: Stefan Roese +Date: Thu Feb 1 13:22:41 2007 +0100 + + [PATCH] Remove PCI-PNP configuration from Sequoia/Rainier config file + + When PCI PNP is enabled the pci pnp configuration routine is called + which sets the PCI_CACHE_SIZE_LINE to 8. This seems to generate some + problems with some PCI cards. For now disable the PCI PNP configuration. + + Signed-off-by: Stefan Roese + +commit 2902fadade3be7659467e8d074048c6b7068f5c0 +Author: Stefan Roese +Date: Wed Jan 31 16:56:10 2007 +0100 + + [PATCH] Update 440EPx/440GRx cpu detection + + Signed-off-by: Stefan Roese + +commit d5ea287b02a6945c3977410e364a879dd1a555c8 +Author: Stefan Roese +Date: Wed Jan 31 16:38:04 2007 +0100 + + [PATCH] Update esd cpci5200 files + + Signed-off-by: Reinhard Arlt + +commit 8b7d1f0ab7d7c4fe3160bbf74a7e9690d9f3a3ab +Author: Stefan Roese +Date: Wed Jan 31 16:37:34 2007 +0100 + + [PATCH] Add support for esd mecp5200 board + + Signed-off-by: Reinhard Arlt + +commit 71a4e5fda8b60044ab9f46069fa1cfa26bdd07ff +Author: Stefan Roese +Date: Wed Jan 31 12:38:50 2007 +0100 + + [PATCH] Remove unneccessary yellowstone board config file + + Signed-off-by: Stefan Roese + +commit e802594b6fa1b166308820c276b96dc0d7cc731c +Author: Stefan Roese +Date: Tue Jan 30 17:06:10 2007 +0100 + + [PATCH] Update Sequoia (440EPx) config file + + The config file now handles the 2nd target, the Rainier (440GRx) + evaluation board better. Additionally the PPC input clock was + adjusted to match the correct value of 33.0 MHz. + + Signed-off-by: Stefan Roese + +commit 700200c67e73b83751418abe7815840dca8fd6cb +Author: Stefan Roese +Date: Tue Jan 30 17:04:19 2007 +0100 + + [PATCH] Merge Yosemite & Yellowstone board ports + + Now the AMCC eval boards Yosemite (440EP) and Yellowstone (440GR) + share one config file and all board specific files. This way we + don't have to maintain two different sets of files for nearly + identical boards. + + Signed-off-by: Stefan Roese + +commit 1bbf5eae322f5f1f6427ecc3ac13a0cb7dba8ad6 +Author: Stefan Roese +Date: Tue Jan 30 15:01:49 2007 +0100 + + [PATCH] Update Prodrive SCPU (PDNB3 variant) board + + SCPU doesn't use redundant environment in flash. + + Signed-off-by: Stefan Roese + +commit 6304430ed642ea8fa15c9e5af965ac2e033eec45 +Author: Stefan Roese +Date: Tue Jan 30 12:51:07 2007 +0100 + + [PATCH] alpr: Update alpr board config file + + Signed-off-by: Stefan Roese + +commit f8db84f132b1e335f20f96138a1f09ed97b08664 +Author: Wolfgang Denk +Date: Tue Jan 30 00:50:40 2007 +0100 + + LPC2292 SODIMM port coding style cleanup. + commit 6bd2447ee47ee23c18d2b3c7ccd5a20f7626f5b3 Author: Gary Jennejohn Date: Wed Jan 24 12:16:56 2007 +0100 @@ -587,6 +1715,14 @@ Date: Tue Nov 28 11:04:45 2006 +0100 Signed-off-by: Stefan Roese +commit 58e3b14c18ed3288ceef8d086946dbf3df64ccf2 +Author: Stefan Roese +Date: Tue Nov 28 11:04:45 2006 +0100 + + [PATCH] nand: Fix patch merge problem + + Signed-off-by: Stefan Roese + commit 4f4b602ec7524a032bdf3c6d28c7f525a4a67eaa Author: Wolfgang Denk Date: Mon Nov 27 22:53:53 2006 +0100