X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;ds=sidebyside;f=include%2Fsdhci.h;h=6a43271e963222f0c3321bf35aaa709ac22e863e;hb=1136eb5e8f782cc60d3535d6369aa0a5bbfc2df0;hp=9f6bbc84317e4dcaa99a7430eba64459b3810a13;hpb=91914581a5419739b64a57bc49076bb604a6b50a;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/sdhci.h b/include/sdhci.h index 9f6bbc8..6a43271 100644 --- a/include/sdhci.h +++ b/include/sdhci.h @@ -214,7 +214,6 @@ #define SDHCI_QUIRK_NO_HISPD_BIT (1 << 3) #define SDHCI_QUIRK_BROKEN_VOLTAGE (1 << 4) #define SDHCI_QUIRK_WAIT_SEND_CMD (1 << 6) -#define SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER (1 << 7) #define SDHCI_QUIRK_USE_WIDE8 (1 << 8) /* to make gcc happy */ @@ -236,6 +235,7 @@ struct sdhci_ops { #endif int (*get_cd)(struct sdhci_host *host); void (*set_control_reg)(struct sdhci_host *host); + void (*set_ios_post)(struct sdhci_host *host); void (*set_clock)(struct sdhci_host *host, u32 div); }; @@ -245,6 +245,7 @@ struct sdhci_host { unsigned int quirks; unsigned int host_caps; unsigned int version; + unsigned int max_clk; /* Maximum Base Clock frequency */ unsigned int clk_mul; /* Clock Multiplier value */ unsigned int clock; struct mmc *mmc; @@ -372,11 +373,11 @@ static inline u8 sdhci_readb(struct sdhci_host *host, int reg) * * @cfg: Configuration structure to fill in (generally &plat->mmc) * @host: SDHCI host structure - * @max_clk: Maximum supported clock speed in HZ (0 for default) - * @min_clk: Minimum supported clock speed in HZ (0 for default) + * @f_max: Maximum supported clock frequency in HZ (0 for default) + * @f_min: Minimum supported clock frequency in HZ (0 for default) */ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, - u32 max_clk, u32 min_clk); + u32 f_max, u32 f_min); /** * sdhci_bind() - Set up a new MMC block device @@ -402,11 +403,11 @@ int sdhci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg); * This is used when you are not using CONFIG_BLK. Convert your driver over! * * @host: SDHCI host structure - * @max_clk: Maximum supported clock speed in HZ (0 for default) - * @min_clk: Minimum supported clock speed in HZ (0 for default) + * @f_max: Maximum supported clock frequency in HZ (0 for default) + * @f_min: Minimum supported clock frequency in HZ (0 for default) * @return 0 if OK, -ve on error */ -int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk); +int add_sdhci(struct sdhci_host *host, u32 f_max, u32 f_min); #endif /* !CONFIG_BLK */ #ifdef CONFIG_DM_MMC_OPS