X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2Ftao3530.h;h=1384a35c0cfe6c4c675f898ee771f82e604cd86d;hb=d01806a8fcbdaedcc67cead56ece572021d97ab7;hp=f994d2dbf3ceff5757a13883aa9f9e4cbd8f6c89;hpb=be62fbf376261ab3a4ed5db3bf54d5df9e216d9f;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h index f994d2d..1384a35 100644 --- a/include/configs/tao3530.h +++ b/include/configs/tao3530.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Configuration settings for the TechNexion TAO-3530 SOM * equipped on Thunder baseboard. @@ -6,8 +7,6 @@ * Tapani Utriainen * * Copyright (C) 2013 Stefan Roese - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -17,8 +16,6 @@ * High Level Configuration Options */ -#define CONFIG_SDRC /* Has an SDRC controller */ - #include /* get chip and board defs */ #include @@ -26,8 +23,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#define CONFIG_MISC_INIT_R - #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG @@ -55,46 +50,29 @@ /* * select serial console configuration */ -#define CONFIG_CONS_INDEX 3 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE /* commands to include */ -#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ -#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -#define MTDIDS_DEFAULT "nand0=nand" -#define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ - "1920k(u-boot),128k(u-boot-env),"\ - "4m(kernel),-(fs)" - -#define CONFIG_CMD_NAND /* NAND support */ #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_OMAP34XX -#define CONFIG_SYS_OMAP24_I2C_SPEED 100000 -#define CONFIG_SYS_OMAP24_I2C_SLAVE 1 #define CONFIG_I2C_MULTI_BUS /* * TWL4030 */ -#define CONFIG_TWL4030_LED /* * Board NAND Info. */ -#define CONFIG_NAND_OMAP_GPMC -#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ - /* to access nand */ #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ /* to access nand at */ /* CS0 */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ /* devices */ -#define CONFIG_SYS_NAND_BUSWIDTH_16BIT /* Environment information */ #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -151,21 +129,9 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ /* turn on command-line edit/hist/auto */ -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) - -#define CONFIG_SYS_ALT_MEMTEST 1 #define CONFIG_SYS_MEMTEST_START (0x82000000) /* memtest */ /* defaults */ #define CONFIG_SYS_MEMTEST_END (0x83FFFFFF) /* 64MB */ @@ -173,7 +139,6 @@ #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ /* load address */ -#define CONFIG_SYS_TEXT_BASE 0x80008000 /* * OMAP3 has 12 GP timers, they can be driven by the system clock @@ -186,7 +151,6 @@ /* * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */ #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 @@ -203,12 +167,10 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP -#define CONFIG_ENV_IS_IN_NAND 1 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ -#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) -#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET +#define CONFIG_ENV_OFFSET 0x260000 #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 @@ -218,8 +180,6 @@ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) -#define CONFIG_OMAP3_SPI - /* * USB * @@ -230,16 +190,7 @@ /* USB EHCI */ #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 162 -#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 -#define CONFIG_USB_HOST_ETHER -#define CONFIG_USB_ETHER_SMSC95XX - -#define CONFIG_USB_ETHER -#define CONFIG_USB_ETHER_RNDIS - /* Defines for SPL */ -#define CONFIG_SPL_FRAMEWORK -#define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" @@ -247,8 +198,6 @@ #define CONFIG_SPL_NAND_BASE #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_ECC -#define CONFIG_SPL_OMAP3_ID_NAND -#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" /* NAND boot config */ #define CONFIG_SYS_NAND_5_ADDR_CYCLE @@ -279,7 +228,6 @@ * older x-loader implementations. And move the BSS area so that it * doesn't overlap with TEXT_BASE. */ -#define CONFIG_SYS_TEXT_BASE 0x80008000 #define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */