X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2Fscb9328.h;h=ecb372f941914bc654b49611118f81eff2052f30;hb=42eccdd650915962345daeae831dab183d67511b;hp=893c3d3c2f742f66fd0cf11cdd4bad18a1b207a2;hpb=ca41ef301b21b3ac25af71750624e0b3d5ddbb3e;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/scb9328.h b/include/configs/scb9328.h
index 893c3d3..ecb372f 100644
--- a/include/configs/scb9328.h
+++ b/include/configs/scb9328.h
@@ -1,21 +1,7 @@
 /*
  * Copyright (C) 2003 ETC s.r.o.
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
+ * SPDX-License-Identifier:	GPL-2.0+
  * Written by Peter Figuli <peposh@etc.sk>, 2003.
  *
  * 2003/13/06 Initial MP10 Support copied from wepep250
@@ -24,10 +10,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_ARM920T		1     /* this is an ARM920T CPU	    */
-#define CONFIG_IMX		1     /* in a Motorola MC9328MXL Chip */
+#define CONFIG_IMX		1     /* This is a Motorola MC9328MXL Chip */
 #define CONFIG_SCB9328		1     /* on a scb9328tronix board */
-#undef	CONFIG_USE_IRQ		      /* don't need use IRQ/FIQ	   */
 
 #define CONFIG_IMX_SERIAL
 #define CONFIG_IMX_SERIAL1
@@ -35,7 +19,6 @@
  * Select serial console configuration
  */
 
-
 /*
  * BOOTP options
  */
@@ -44,13 +27,11 @@
 #define CONFIG_BOOTP_GATEWAY
 #define CONFIG_BOOTP_HOSTNAME
 
-
 /*
  * Command line configuration.
  */
 #include <config_cmd_default.h>
 
-#define CONFIG_CMD_NET
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_DHCP
 
@@ -58,7 +39,6 @@
 #undef CONFIG_CMD_LOADS
 #undef CONFIG_CMD_SOURCE
 
-
 /*
  * Boot options. Setting delay to -1 stops autostart count down.
  * NOTE: Sending parameters to kernel depends on kernel version and
@@ -69,7 +49,6 @@
 #define CONFIG_BOOTARGS	   "console=ttySMX0,115200n8 root=/dev/mtdblock3 rootfstype=jffs2 mtdparts=scb9328_flash:128k(U-boot)ro,128k(U-boot_env),1m(kernel),4m(root),4m(fs) eval_board=evk9328"
 #define CONFIG_BOOTCOMMAND "bootm 10040000"
 #define CONFIG_SHOW_BOOT_PROGRESS
-#define CONFIG_ETHADDR		80:81:82:83:84:85
 #define CONFIG_NETMASK		255.255.255.0
 #define CONFIG_IPADDR		10.10.10.9
 #define CONFIG_SERVERIP		10.10.10.10
@@ -87,10 +66,8 @@
 #define CONFIG_SYS_MEMTEST_START	0x08100000	      /* memtest test area   */
 #define CONFIG_SYS_MEMTEST_END		0x08F00000
 
-#define CONFIG_SYS_HZ			3686400	     /* incrementer freq: 3.6864 MHz */
 #define CONFIG_SYS_CPUSPEED		0x141	     /* core clock - register value  */
 
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
 #define CONFIG_BAUDRATE 115200
 /*
  * Definitions related to passing arguments to kernel.
@@ -98,24 +75,12 @@
 #define CONFIG_CMDLINE_TAG	     1	 /* send commandline to Kernel	     */
 #define CONFIG_SETUP_MEMORY_TAGS     1	 /* send memory definition to kernel */
 #define CONFIG_INITRD_TAG	     1	 /* send initrd params		     */
-#undef	CONFIG_VFD			 /* do not send framebuffer setup    */
-
 
 /*
  * Malloc pool need to host env + 128 Kb reserve for other allocations.
  */
 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (128<<10) )
 
-
-#define CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
-
-#define CONFIG_STACKSIZE	(120<<10)      /* stack size		     */
-
-#ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ	(4<<10)	       /* IRQ stack		     */
-#define CONFIG_STACKSIZE_FIQ	(4<<10)	       /* FIQ stack		     */
-#endif
-
 /* SDRAM Setup Values
 0x910a8300 Precharge Command CAS 3
 0x910a8200 Precharge Command CAS 2
@@ -134,14 +99,10 @@
 #define SCB9328_SDRAM_1		0x08000000	/* SDRAM bank #1	   */
 #define SCB9328_SDRAM_1_SIZE	0x01000000	/* 16 MB		   */
 
-/*
- * Flash Controller settings
- */
-
-/*
- * Hardware drivers
- */
+#define CONFIG_SYS_TEXT_BASE	0x10000000
 
+#define CONFIG_SYS_SDRAM_BASE	SCB9328_SDRAM_1
+#define CONFIG_SYS_INIT_SP_ADDR	(SCB9328_SDRAM_1 + 0xf00000)
 
 /*
  * Configuration for FLASH memory for the Synertronixx board
@@ -178,8 +139,8 @@
    now.*/
 #undef	CONFIG_SYS_FLASH_CFI
 
-#define CONFIG_SYS_FLASH_ERASE_TOUT	(2*CONFIG_SYS_HZ)    /* timeout for Erase operation */
-#define CONFIG_SYS_FLASH_WRITE_TOUT	(2*CONFIG_SYS_HZ)    /* timeout for Write operation */
+#define CONFIG_SYS_FLASH_ERASE_TOUT	240000    /* timeout for Erase operation */
+#define CONFIG_SYS_FLASH_WRITE_TOUT	240000    /* timeout for Write operation */
 
 #define CONFIG_SYS_FLASH_BASE		SCB9328_FLASH_BASE