X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2Fp1_p2_rdb_pc.h;h=3b3baefaf03a3035b89bae07433a343062b392f2;hb=fa379223cd61052331342e525778d96270ee6ed9;hp=9b142bc6f471e3fb9bf088b05379256927067781;hpb=f77309d34325369dbdf0bf62387c9e974f1b37da;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 9b142bc..3b3baef 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -72,7 +72,6 @@ */ #define CONFIG_MTD_DEVICE #define CONFIG_MTD_PARTITIONS -#define CONFIG_CMD_MTDPARTS #define CONFIG_FLASH_CFI_MTD #define MTDIDS_DEFAULT "nor0=ec000000.nor" #define MTDPARTS_DEFAULT "mtdparts=ec000000.nor:128k(dtb),6016k(kernel)," \ @@ -98,7 +97,6 @@ */ #define CONFIG_MTD_DEVICE #define CONFIG_MTD_PARTITIONS -#define CONFIG_CMD_MTDPARTS #define CONFIG_FLASH_CFI_MTD #ifdef CONFIG_PHYS_64BIT #define MTDIDS_DEFAULT "nor0=fef000000.nor" @@ -157,7 +155,6 @@ */ #define CONFIG_MTD_DEVICE #define CONFIG_MTD_PARTITIONS -#define CONFIG_CMD_MTDPARTS #define CONFIG_FLASH_CFI_MTD #ifdef CONFIG_PHYS_64BIT #define MTDIDS_DEFAULT "nor0=fef000000.nor" @@ -260,7 +257,6 @@ #define CONFIG_MP -#define CONFIG_FSL_ELBC #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ @@ -271,7 +267,6 @@ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE -#define CONFIG_CMD_SATA #define CONFIG_SATA_SIL #define CONFIG_SYS_SATA_MAX_DEVICE 2 #define CONFIG_LIBATA @@ -435,7 +430,6 @@ #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_CMD_NAND #if defined(CONFIG_TARGET_P1020RDB_PD) #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) #else @@ -632,7 +626,6 @@ #define CONFIG_SYS_I2C_PCA9557_ADDR 0x18 /* enable read and write access to EEPROM */ -#define CONFIG_CMD_EEPROM #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 @@ -693,8 +686,6 @@ #endif #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ -#define CONFIG_CMD_PCI - #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif /* CONFIG_PCI */ @@ -721,8 +712,6 @@ #define CONFIG_ETHPRIME "eTSEC1" -#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ - #define CONFIG_HAS_ETH0 #define CONFIG_HAS_ETH1 #define CONFIG_HAS_ETH2 @@ -775,7 +764,6 @@ * Environment */ #ifdef CONFIG_SPIFLASH -#define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 #define CONFIG_ENV_SPI_MAX_HZ 10000000 @@ -784,7 +772,6 @@ #define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ #define CONFIG_ENV_SECT_SIZE 0x10000 #elif defined(CONFIG_SDCARD) -#define CONFIG_ENV_IS_IN_MMC #define CONFIG_FSL_FIXED_MMC_LOCATION #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_SYS_MMC_ENV_DEV 0 @@ -795,15 +782,12 @@ #else #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE #endif -#define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET (1024 * 1024) #define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE) #elif defined(CONFIG_SYS_RAMBOOT) -#define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */ #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) #define CONFIG_ENV_SIZE 0x2000 #else -#define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ @@ -813,21 +797,12 @@ #define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ /* - * Command line configuration. - */ -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_DATE -#define CONFIG_CMD_REGINFO - -/* * USB */ #define CONFIG_HAS_FSL_DR_USB #if defined(CONFIG_HAS_FSL_DR_USB) -#define CONFIG_USB_EHCI - -#ifdef CONFIG_USB_EHCI +#ifdef CONFIG_USB_EHCI_HCD #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_USB_EHCI_FSL #endif @@ -885,8 +860,6 @@ #define CONFIG_BOOTARGS /* the boot command will set bootargs */ -#define CONFIG_BAUDRATE 115200 - #ifdef __SW_BOOT_NOR #define __NOR_RST_CMD \ norboot=i2c dev 1; i2c mw 18 1 __SW_BOOT_NOR 1; \