X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2Fmx31pdk.h;h=e351f05c06999598201102526d3f96dcaa96d347;hb=a5d67547dd9c7a527dfda1967010e703a22441ff;hp=1282a6e77e3c244ade82dab0ab18a9244c37516b;hpb=ba1a10796316a5b81c1c91663148fc7da5843e3a;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 1282a6e..e351f05 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -19,11 +19,6 @@ /* High Level Configuration Options */ #define CONFIG_MX31 /* This is a mx31 */ -#define CONFIG_SYS_GENERIC_BOARD - -#define CONFIG_DISPLAY_CPUINFO -#define CONFIG_DISPLAY_BOARDINFO - #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG @@ -33,8 +28,6 @@ #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" #define CONFIG_SPL_MAX_SIZE 2048 -#define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_TEXT_BASE 0x87dc0000 #define CONFIG_SYS_TEXT_BASE 0x87e00000 @@ -80,26 +73,9 @@ /*********************************************************** * Command definition ***********************************************************/ - -#include - -#define CONFIG_CMD_MII -#define CONFIG_CMD_PING -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_SPI #define CONFIG_CMD_DATE #define CONFIG_CMD_NAND -#define CONFIG_CMD_BOOTZ -/* - * Disabled due to compilation errors in cmd_bootm.c (IMLS seems to require - * that CFG_NO_FLASH is undefined). - */ -#undef CONFIG_CMD_IMLS - -#define CONFIG_BOARD_LATE_INIT - -#define CONFIG_BOOTDELAY 1 #define CONFIG_EXTRA_ENV_SETTINGS \ "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \ @@ -141,7 +117,6 @@ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 CSD0_BASE #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) -#define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR @@ -174,7 +149,7 @@ /* NAND configuration for the NAND_SPL */ -/* Start copying real U-boot from the second page */ +/* Start copying real U-Boot from the second page */ #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x3f800 /* Load U-Boot to this address */ @@ -187,7 +162,6 @@ #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 - /* Configuration of lowlevel_init.S (clocks and SDRAM) */ #define CCM_CCMR_SETUP 0x074B0BF5 #define CCM_PDR0_SETUP_532MHZ (PDR0_CSI_PODF(0x3f) | PDR0_CSI_PRDF(7) | \