X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2Fmx31pdk.h;h=3b86c9ebf356562f401c7c22efe38bc7fd850d5a;hb=be3b51aa4a450f3e3fcd9c6e5074ef435812a02d;hp=47e7c866c034a5833f76be516ef3c33a4ecf718c;hpb=73bb4c72407aca3c2f461708bb872a23f2b1bf5a;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 47e7c86..3b86c9e 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -30,56 +30,59 @@ #ifndef __CONFIG_H #define __CONFIG_H -#include +#include /* High Level Configuration Options */ -#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */ -#define CONFIG_MX31 1 /* in a mx31 */ -#define CONFIG_MX31_HCLK_FREQ 26000000 -#define CONFIG_MX31_CLK32 32768 +#define CONFIG_ARM1136 /* This is an arm1136 CPU core */ +#define CONFIG_MX31 /* in a mx31 */ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG + +#define CONFIG_MACH_TYPE MACH_TYPE_MX31_3DS #if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) #define CONFIG_SKIP_LOWLEVEL_INIT -#define CONFIG_SKIP_RELOCATE_UBOOT #endif /* * Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (2*CONFIG_ENV_SIZE + 2 * 128 * 1024) -/* Bytes reserved for initial data */ /* * Hardware drivers */ -#define CONFIG_MXC_UART 1 -#define CONFIG_SYS_MX31_UART1 1 +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART1_BASE +#define CONFIG_HW_WATCHDOG +#define CONFIG_MXC_GPIO -#define CONFIG_HARD_SPI 1 -#define CONFIG_MXC_SPI 1 +#define CONFIG_HARD_SPI +#define CONFIG_MXC_SPI #define CONFIG_DEFAULT_SPI_BUS 1 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) -#define CONFIG_FSL_PMIC +/* PMIC Controller */ +#define CONFIG_POWER +#define CONFIG_POWER_SPI +#define CONFIG_POWER_FSL #define CONFIG_FSL_PMIC_BUS 1 #define CONFIG_FSL_PMIC_CS 2 #define CONFIG_FSL_PMIC_CLK 1000000 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) -#define CONFIG_RTC_MC13783 1 +#define CONFIG_FSL_PMIC_BITLEN 32 +#define CONFIG_RTC_MC13XXX /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} /*********************************************************** * Command definition @@ -89,9 +92,11 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP #define CONFIG_CMD_SPI #define CONFIG_CMD_DATE #define CONFIG_CMD_NAND +#define CONFIG_CMD_BOOTZ /* * Disabled due to compilation errors in cmd_bootm.c (IMLS seems to require @@ -99,6 +104,8 @@ */ #undef CONFIG_CMD_IMLS +#define CONFIG_BOARD_LATE_INIT + #define CONFIG_BOOTDELAY 3 #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -112,16 +119,15 @@ "nand erase 0x0 0x40000; " \ "nand write 0x81000000 0x0 0x40000\0" -#define CONFIG_NET_MULTI -#define CONFIG_SMC911X 1 +#define CONFIG_SMC911X #define CONFIG_SMC911X_BASE 0xB6000000 -#define CONFIG_SMC911X_32_BIT 1 +#define CONFIG_SMC911X_32_BIT /* * Miscellaneous configurable options */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "uboot> " +#define CONFIG_SYS_PROMPT "MX31PDK U-Boot > " #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ /* Print Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ @@ -133,21 +139,14 @@ /* memtest works on */ #define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END 0x10000 +#define CONFIG_SYS_MEMTEST_END 0x80010000 /* default load address */ #define CONFIG_SYS_LOAD_ADDR 0x81000000 #define CONFIG_SYS_HZ 1000 -#define CONFIG_CMDLINE_EDITING 1 - -/*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ +#define CONFIG_CMDLINE_EDITING /*----------------------------------------------------------------------- * Physical Memory Map @@ -155,14 +154,23 @@ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 CSD0_BASE #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) +#define CONFIG_BOARD_EARLY_INIT_F + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_GBL_DATA_OFFSET) /*----------------------------------------------------------------------- * FLASH and environment organization */ /* No NOR flash present */ -#define CONFIG_SYS_NO_FLASH 1 +#define CONFIG_SYS_NO_FLASH -#define CONFIG_ENV_IS_IN_NAND 1 +#define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET 0x40000 #define CONFIG_ENV_OFFSET_REDUND 0x60000 #define CONFIG_ENV_SIZE (128 * 1024) @@ -195,11 +203,11 @@ /* Configuration of lowlevel_init.S (clocks and SDRAM) */ #define CCM_CCMR_SETUP 0x074B0BF5 -#define CCM_PDR0_SETUP_532MHZ (PDR0_CSI_PODF(0x1ff) | PDR0_PER_PODF(7) | \ - PDR0_HSP_PODF(3) | PDR0_NFC_PODF(5) | \ - PDR0_IPG_PODF(1) | PDR0_MAX_PODF(3) | \ - PDR0_MCU_PODF(0)) -#define CCM_MPCTL_SETUP_532MHZ (PLL_PD(0) | PLL_MFD(51) | PLL_MFI(10) | \ +#define CCM_PDR0_SETUP_532MHZ (PDR0_CSI_PODF(0x3f) | PDR0_CSI_PRDF(7) | \ + PDR0_PER_PODF(7) | PDR0_HSP_PODF(3) | \ + PDR0_NFC_PODF(5) | PDR0_IPG_PODF(1) | \ + PDR0_MAX_PODF(3) | PDR0_MCU_PODF(0)) +#define CCM_MPCTL_SETUP_532MHZ (PLL_PD(0) | PLL_MFD(51) | PLL_MFI(10) | \ PLL_MFN(12)) #define ESDMISC_MDDR_SETUP 0x00000004