X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2Fmaxbcm.h;h=db84302231a6dfeb12ca964557d70dee5fd7cdc9;hb=a29491ade0adf3dbb9dc51be8b45530edde1f1df;hp=fc2393204bec762223c54a95be49091d7c8fc570;hpb=a25277122dad99837b78cd3b3ae6b8214df88c26;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h
index fc23932..db84302 100644
--- a/include/configs/maxbcm.h
+++ b/include/configs/maxbcm.h
@@ -6,6 +6,8 @@
 #ifndef _CONFIG_DB_MV7846MP_GP_H
 #define _CONFIG_DB_MV7846MP_GP_H
 
+#include <linux/sizes.h>
+
 /*
  * High Level Configuration Options (easy to change)
  */
@@ -17,11 +19,7 @@
  */
 
 /* I2C */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MVTWSI
 #define CONFIG_I2C_MVTWSI_BASE0		MVEBU_TWSI_BASE
-#define CONFIG_SYS_I2C_SLAVE		0x0
-#define CONFIG_SYS_I2C_SPEED		100000
 
 /* SPI NOR flash default params, used by sf commands */
 
@@ -48,24 +46,7 @@
  * L2 cache thus cannot be used.
  */
 
-/* SPL */
-/* Defines for SPL */
-#define CONFIG_SPL_MAX_SIZE		((128 << 10) - 0x4030)
-
-#define CONFIG_SPL_BSS_START_ADDR	(0x40000000 + (128 << 10))
-#define CONFIG_SPL_BSS_MAX_SIZE		(16 << 10)
-
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_MALLOC_SIMPLE
-#endif
-
-#define CONFIG_SPL_STACK		(0x40000000 + ((192 - 16) << 10))
-#define CONFIG_SPL_BOOTROM_SAVE		(CONFIG_SPL_STACK + 4)
-
-/* SPL related SPI defines */
-
 /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
-#define CONFIG_DDR_FIXED_SIZE		(1 << 20)	/* 1GiB */
-#define CONFIG_BOARD_ECC_SUPPORT	/* this board supports ECC */
+#define CONFIG_SYS_SDRAM_SIZE		SZ_1G
 
 #endif /* _CONFIG_DB_MV7846MP_GP_H */