X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2Fio.h;h=3a535684e3cca394c0ca2f98e72e8c954d289861;hb=a1dc980d88a5c9c2b99251c8d8299b0c8948de73;hp=33743e61ac0951b7e655d28daafcffa8dc463f7d;hpb=8b485ba12b0defa0c4ed3559789250238f8331a8;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/io.h b/include/configs/io.h index 33743e6..3a53568 100644 --- a/include/configs/io.h +++ b/include/configs/io.h @@ -2,14 +2,13 @@ * (C) Copyright 2010 * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H #define __CONFIG_H #define CONFIG_405EP 1 /* this is a PPC405 CPU */ -#define CONFIG_4xx 1 /* member of PPC4xx family */ #define CONFIG_IO 1 /* on a Io board */ #define CONFIG_SYS_TEXT_BASE 0xFFFC0000 @@ -18,10 +17,8 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME io -#define CONFIG_IDENT_STRING " io 0.05" #include "amcc-common.h" -#define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_EARLY_INIT_R #define CONFIG_MISC_INIT_R #define CONFIG_LAST_STAGE_INIT @@ -34,14 +31,6 @@ #define PLLMR0_DEFAULT PLLMR0_266_133_66 #define PLLMR1_DEFAULT PLLMR1_266_133_66 -#undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ -#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ -#define CONFIG_AUTOBOOT_STOP_STR " " - -/* new uImage format support */ -#define CONFIG_FIT -#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ - #define CONFIG_ENV_IS_IN_FLASH /* use FLASH for environment vars */ /* @@ -65,9 +54,7 @@ /* * Commands additional to the ones defined in amcc-common.h */ -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_DTT -#undef CONFIG_CMD_EEPROM +#undef CONFIG_CMD_IRQ /* * SDRAM configuration (please see cpu/ppc/sdram.[ch]) @@ -101,11 +88,6 @@ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 /* Temp sensor/hwmon/dtt */ -#define CONFIG_DTT_LM63 1 /* National LM63 */ -#define CONFIG_DTT_SENSORS { 0 } /* Sensor addresses */ -#define CONFIG_DTT_PWM_LOOKUPTABLE \ - { { 40, 10 }, { 50, 20 }, { 60, 40 } } -#define CONFIG_DTT_TACH_LIMIT 0xa10 /* * FLASH organization @@ -123,7 +105,6 @@ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write/ms */ #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buff'd writes */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* use hardware flash protect */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* 'E' for empty sector on flinfo */ #define CONFIG_SYS_FLASH_QUIET_TEST 1 /* no warn upon unknown flash */ @@ -198,11 +179,10 @@ #define CONFIG_SYS_OCM_DATA_ADDR 0xF8000000 #define CONFIG_SYS_OCM_DATA_SIZE 0x1000 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* in SDRAM */ -#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE /* End of used area */ +#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size/bytes res'd for init data*/ #define CONFIG_SYS_GBL_DATA_OFFSET \ - (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /* @@ -230,6 +210,11 @@ #define CONFIG_SYS_FPGA_COUNT 1 +#define CONFIG_SYS_FPGA_PTR \ + { (struct ihs_fpga *)CONFIG_SYS_FPGA0_BASE } + +#define CONFIG_SYS_FPGA_COMMON + /* Memory Bank 3 (Latches) initialization */ #define CONFIG_SYS_LATCH_BASE 0x7f200000 #define CONFIG_SYS_EBC_PB3AP 0xa2015480