X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2Fep8248.h;h=e669dc6cf714e7a0f270de365451a736996877e8;hb=4c25761337570e63e9e2631a81de221e692251e3;hp=f7b3fdea88dd8536a0360eb16d17177a7b45ad4c;hpb=cb5473205206c7f14cbb1e747f28ec75b48826e2;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/ep8248.h b/include/configs/ep8248.h
index f7b3fde..e669dc6 100644
--- a/include/configs/ep8248.h
+++ b/include/configs/ep8248.h
@@ -31,6 +31,8 @@
 
 #define CONFIG_EP8248			/* Embedded Planet EP8248 board */
 
+#define	CONFIG_SYS_TEXT_BASE	0xFFF00000
+
 #define CONFIG_BOARD_EARLY_INIT_F 1	/* Call board_early_init_f	*/
 
 /* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */
@@ -50,50 +52,40 @@
 
 #define CONFIG_SYS_BCSR		0xFA000000
 
-/*
- * Select ethernet configuration
- *
- * If either CONFIG_ETHER_ON_SCC or CONFIG_ETHER_ON_FCC is selected,
- * then CONFIG_ETHER_INDEX must be set to the channel number (1-4 for
- * SCC, 1-3 for FCC)
- *
- * If CONFIG_ETHER_NONE is defined, then either the ethernet routines
- * must be defined elsewhere (as for the console), or CONFIG_CMD_NET
- * must be unset.
- */
+/* Pass open firmware flat device tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+
+#define OF_TBCLK        (bd->bi_busfreq / 4)
+#define OF_STDOUT_PATH  "/soc/cpm/serial <at> 11a80"
+
+/* Select ethernet configuration */
 #undef	CONFIG_ETHER_ON_SCC		/* Ethernet is not on SCC */
 #define CONFIG_ETHER_ON_FCC		/* Ethernet is on FCC     */
 #undef	CONFIG_ETHER_NONE		/* No external Ethernet   */
 
-#ifdef CONFIG_ETHER_ON_FCC
-
-#define CONFIG_ETHER_INDEX	1	/* FCC1 is used for Ethernet */
-
-#if   (CONFIG_ETHER_INDEX == 1)
+#define CONFIG_SYS_CPMFCR_RAMTYPE	0
+#define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE | FCC_PSMR_LPB)
 
+#define CONFIG_HAS_ETH0
+#define CONFIG_ETHER_ON_FCC1		1
 /* - Rx clock is CLK10
  * - Tx clock is CLK11
  * - BDs/buffers on 60x bus
  * - Full duplex
  */
-#define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC1 | CMXFCR_RF1CS_MSK | CMXFCR_TF1CS_MSK)
-#define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF1CS_CLK10 | CMXFCR_TF1CS_CLK11)
-#define CONFIG_SYS_CPMFCR_RAMTYPE	0
-#define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE | FCC_PSMR_LPB)
-
-#elif (CONFIG_ETHER_INDEX == 2)
+#define CONFIG_SYS_CMXFCR_MASK1	(CMXFCR_FC1 | CMXFCR_RF1CS_MSK | CMXFCR_TF1CS_MSK)
+#define CONFIG_SYS_CMXFCR_VALUE1	(CMXFCR_RF1CS_CLK10 | CMXFCR_TF1CS_CLK11)
 
+#define CONFIG_HAS_ETH1
+#define CONFIG_ETHER_ON_FCC2		1
 /* - Rx clock is CLK13
  * - Tx clock is CLK14
  * - BDs/buffers on 60x bus
  * - Full duplex
  */
-#define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
-#define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
-#define CONFIG_SYS_CPMFCR_RAMTYPE	0
-#define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE | FCC_PSMR_LPB)
-
-#endif /* CONFIG_ETHER_INDEX */
+#define CONFIG_SYS_CMXFCR_MASK2	(CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
+#define CONFIG_SYS_CMXFCR_VALUE2	(CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
 
 #define CONFIG_MII			/* MII PHY management        */
 #define CONFIG_BITBANGMII		/* Bit-banged MDIO interface */
@@ -101,6 +93,7 @@
  * GPIO pins used for bit-banged MII communications
  */
 #define MDIO_PORT		0	/* Not used - implemented in BCSR */
+
 #define MDIO_ACTIVE		(*(vu_char *)(CONFIG_SYS_BCSR + 8) &= 0xFB)
 #define MDIO_TRISTATE		(*(vu_char *)(CONFIG_SYS_BCSR + 8) |= 0x04)
 #define MDIO_READ		(*(vu_char *)(CONFIG_SYS_BCSR + 8) & 1)
@@ -113,8 +106,6 @@
 
 #define MIIDELAY		udelay(1)
 
-#endif /* CONFIG_ETHER_ON_FCC */
-
 #ifndef CONFIG_8260_CLKIN
 #define CONFIG_8260_CLKIN	66000000	/* in Hz */
 #endif
@@ -163,7 +154,6 @@
  * Miscellaneous configurable options
  */
 #define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
 #define CONFIG_SYS_LONGHELP			/* undef to save memory	    */
 #define CONFIG_SYS_PROMPT		"=> "	/* Monitor Command Prompt   */
 #if defined(CONFIG_CMD_KGDB)
@@ -207,7 +197,7 @@
 #define CONFIG_SYS_I2C_SLAVE		0x7F	/* I2C slave address		*/
 #endif
 
-#define CONFIG_SYS_MONITOR_BASE	TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 #define CONFIG_SYS_RAMBOOT
 #endif
@@ -226,9 +216,8 @@
 #define CONFIG_SYS_IMMR		0xF0000000
 
 #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_IMMR
-#define CONFIG_SYS_INIT_RAM_END	0x2000	/* End of used area in DPRAM	*/
-#define CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE	0x2000	/* Size of used area in DPRAM	*/
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
 /* Hard reset configuration word */
@@ -242,9 +231,6 @@
 #define CONFIG_SYS_HRCW_SLAVE6		0
 #define CONFIG_SYS_HRCW_SLAVE7		0
 
-#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM		0x02	/* Software reboot                  */
-
 #define CONFIG_SYS_MALLOC_LEN		(4096 << 10)	/* Reserve 4 MB for malloc()	*/
 #define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */