X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2Fedminiv2.h;h=1d6e6bcc4345dc6095d092b249a86a9bb649f0a1;hb=10f6e4dc3a16c21f235416f975ecf2070ceb351f;hp=e20e058e0a32b41b646cc1f24a7efb39abf44acc;hpb=0dadad6d7c5769d6258baeaf1b8db843b0dfa01f;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index e20e058..1d6e6bc 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -15,12 +15,6 @@ * SPL */ -#define CONFIG_SPL_MAX_SIZE 0x0000fff0 -#define CONFIG_SPL_STACK 0x00020000 -#define CONFIG_SPL_BSS_START_ADDR 0x00020000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x0001ffff -#define CONFIG_SYS_SPL_MALLOC_START 0x00040000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x0001ffff #define CONFIG_SYS_UBOOT_BASE 0xfff90000 #define CONFIG_SYS_UBOOT_START 0x00800000 @@ -85,14 +79,11 @@ * FLASH configuration */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */ #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max num of sects on one chip */ #define CONFIG_SYS_FLASH_BASE 0xfff80000 /* auto boot */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ - /* * Network */ @@ -101,8 +92,6 @@ #define CONFIG_MVGBE_PORTS {1} /* enable port 0 only */ #define CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION /* don't randomize MAC */ #define CONFIG_PHY_BASE_ADR 0x8 -#define CONFIG_RESET_PHY_R /* use reset_phy() to init mv8831116 PHY */ -#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ #endif /* @@ -111,20 +100,12 @@ #ifdef CONFIG_IDE #define __io /* Data, registers and alternate blocks are at the same offset */ -#define CONFIG_SYS_ATA_DATA_OFFSET (0x0100) -#define CONFIG_SYS_ATA_REG_OFFSET (0x0100) -#define CONFIG_SYS_ATA_ALT_OFFSET (0x0100) /* Each 8-bit ATA register is aligned to a 4-bytes address */ -#define CONFIG_SYS_ATA_STRIDE 4 /* Controller supports 48-bits LBA addressing */ #define CONFIG_LBA48 /* A single bus, a single device */ -#define CONFIG_SYS_IDE_MAXBUS 1 -#define CONFIG_SYS_IDE_MAXDEVICE 1 /* ATA registers base is at SATA controller base */ -#define CONFIG_SYS_ATA_BASE_ADDR ORION5X_SATA_BASE /* ATA bus 0 is orion5x port 1 on ED Mini V2 */ -#define CONFIG_SYS_ATA_IDE0_OFFSET ORION5X_SATA_PORT1_OFFSET /* end of IDE defines */ #endif /* CMD_IDE */ @@ -152,7 +133,5 @@ /* additions for new relocation code, must be added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) #endif /* _CONFIG_EDMINIV2_H */