X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2Fadp-ag101p.h;h=71c7fe929d3d4df1787d36dec9c828d911dad62b;hb=6d7dacf726ca043a3f5487549bbfa506c990c813;hp=2187445b31acb3c15157bd58e51ce4c986d5aee6;hpb=1f20fc53b382ece8da7440f354b219deb7ed19df;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h index 2187445..71c7fe9 100644 --- a/include/configs/adp-ag101p.h +++ b/include/configs/adp-ag101p.h @@ -1,9 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) 2011 Andes Technology Corporation * Shawn Lin, Andes Technology Corporation * Macpaul Lin, Andes Technology Corporation - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -14,16 +13,11 @@ /* * CPU and Board Configuration Options */ -#define CONFIG_ADP_AG101P - #define CONFIG_USE_INTERRUPT #define CONFIG_SKIP_LOWLEVEL_INIT -#define CONFIG_CMDLINE_EDITING - -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF +#define CONFIG_ARCH_MAP_SYSMEM #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_BOOTP_SERVERIP @@ -33,17 +27,10 @@ #endif #ifdef CONFIG_SKIP_LOWLEVEL_INIT -#define CONFIG_SYS_TEXT_BASE 0x00500000 #ifdef CONFIG_OF_CONTROL #undef CONFIG_OF_SEPARATE #define CONFIG_OF_EMBED #endif -#else -#ifdef CONFIG_MEM_REMAP -#define CONFIG_SYS_TEXT_BASE 0x80000000 -#else -#define CONFIG_SYS_TEXT_BASE 0x00000000 -#endif #endif /* @@ -87,7 +74,6 @@ */ /* FTUART is a high speed NS 16C550A compatible UART, addr: 0x99600000 */ -#define CONFIG_CONS_INDEX 1 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_COM1 CONFIG_FTUART010_02_BASE #ifndef CONFIG_DM_SERIAL @@ -96,19 +82,8 @@ #define CONFIG_SYS_NS16550_CLK ((18432000 * 20) / 25) /* AG101P */ /* - * SD (MMC) controller - */ -#define CONFIG_FTSDC010 -#define CONFIG_FTSDC010_NUMBER 1 -#define CONFIG_FTSDC010_SDIO - -/* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ - -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* * Size of malloc() pool @@ -219,8 +194,6 @@ #define PHYS_SDRAM_1 \ (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */ -#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 bank of DRAM */ - #ifdef CONFIG_SKIP_LOWLEVEL_INIT #define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */ #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */ @@ -307,11 +280,8 @@ * FLASH and environment organization */ /* use CFI framework */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* support JEDEC */ @@ -346,12 +316,9 @@ /* max number of sectors on one chip */ #define CONFIG_FLASH_SECTOR_SIZE (0x10000*2) -#define CONFIG_ENV_SECT_SIZE CONFIG_FLASH_SECTOR_SIZE #define CONFIG_SYS_MAX_FLASH_SECT 512 /* environments */ -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + 0x140000) -#define CONFIG_ENV_SIZE 8192 #define CONFIG_ENV_OVERWRITE /*