X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2FPMC405.h;h=eb1a166f91ddc459f91c25957a60ce5a958f2446;hb=14d0a02a168b36e87665b8d7f42fa3e88263d26d;hp=c598d00cf0cec263fb1af808b0af943d6694bce1;hpb=44a01a73e8e68704fba7ce48091c70003cb4569e;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/PMC405.h b/include/configs/PMC405.h
index c598d00..eb1a166 100644
--- a/include/configs/PMC405.h
+++ b/include/configs/PMC405.h
@@ -130,6 +130,12 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000 /* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x0C00000 /* 4 ... 12 MB in DRAM */
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef CONFIG_SYS_EXT_SERIAL_CLOCK		/* no external serial clock */
 #define CONFIG_SYS_BASE_BAUD	806400
 
@@ -181,14 +187,16 @@
 #define CONFIG_SYS_PCI_PTM2MS  0xff000001	/* 16MB, enable */
 #define CONFIG_SYS_PCI_PTM2PCI 0x00000000	/* Host: use this pci address */
 
+#define CONFIG_PCI_4xx_PTM_OVERWRITE	1 /* overwrite PTMx settings by env */
+
 /*
  * Start addresses for the final memory configuration
  * (Set up by the startup code)
  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
  */
 #define CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_MONITOR_BASE		TEXT_BASE
-#define CONFIG_SYS_MONITOR_LEN		(~(TEXT_BASE) + 1)
+#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_MONITOR_LEN		(~(CONFIG_SYS_TEXT_BASE) + 1)
 #define CONFIG_SYS_MALLOC_LEN		(128 * 1024) /* 128 kB for malloc() */
 
 #define CONFIG_PRAM			0 /* use pram variable to overwrite */
@@ -233,6 +241,7 @@
  * I2C EEPROM (CAT24WC16) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		100000 /* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
@@ -282,9 +291,6 @@
 /*
  * FPGA stuff
  */
-#define CONFIG_SYS_FPGA_XC95XL		1	/* using Xilinx XC95XL CPLD */
-#define CONFIG_SYS_FPGA_MAX_SIZE	(32 * 1024) /* 32kByte for CPLD */
-
 /* FPGA program pin configuration */
 #define CONFIG_SYS_FPGA_PRG		0x04000000 /* JTAG TMS pin (output) */
 #define CONFIG_SYS_FPGA_CLK		0x02000000 /* JTAG TCK pin (output) */