X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2FIDS8247.h;h=71bb7b48c8d9b9988865e9240dd9b8f26382b0f6;hb=4b142febff71eabdb7ddbb125c7b583b24ddc434;hp=a610ac9c23688ea8fc2ad6f79c799abe66c9d8df;hpb=f61f1e150c84f5b9347fca79a4bc5f2286c545d2;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/IDS8247.h b/include/configs/IDS8247.h index a610ac9..71bb7b4 100644 --- a/include/configs/IDS8247.h +++ b/include/configs/IDS8247.h @@ -125,8 +125,6 @@ #define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP 1 -#define OF_CPU "PowerPC,8247@0" -#define OF_SOC "soc@f0000000" #define OF_TBCLK (bd->bi_busfreq / 4) #define OF_STDOUT_PATH "/soc@f0000000/serial8250@e0008000" @@ -262,64 +260,8 @@ */ #if defined(CONFIG_CMD_NAND) -#define CONFIG_NAND_LEGACY #define CONFIG_SYS_NAND0_BASE 0xE1000000 - #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define SECTORSIZE 512 -#define NAND_NO_RB - -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 - -#define NAND_DISABLE_CE(nand) do \ -{ \ - *(((volatile __u8 *)(nand->IO_ADDR)) + 0xc) = 0; \ -} while(0) - -#define NAND_ENABLE_CE(nand) do \ -{ \ - *(((volatile __u8 *)(nand->IO_ADDR)) + 0x8) = 0; \ -} while(0) - -#define NAND_CTL_CLRALE(nandptr) do \ -{ \ - *(((volatile __u8 *)nandptr) + 0x8) = 0; \ -} while(0) - -#define NAND_CTL_SETALE(nandptr) do \ -{ \ - *(((volatile __u8 *)nandptr) + 0x9) = 0; \ -} while(0) - -#define NAND_CTL_CLRCLE(nandptr) do \ -{ \ - *(((volatile __u8 *)nandptr) + 0x8) = 0; \ -} while(0) - -#define NAND_CTL_SETCLE(nandptr) do \ -{ \ - *(((volatile __u8 *)nandptr) + 0xa) = 0; \ -} while(0) - -#ifdef NAND_NO_RB -/* constant delay (see also tR in the datasheet) */ -#define NAND_WAIT_READY(nand) do { \ - udelay(12); \ -} while (0) -#else -/* use the R/B pin */ -#endif - -#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)(adr + 0x2)) = (__u8)(d); } while(0) -#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)(adr + 0x1)) = (__u8)(d); } while(0) -#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)(adr + 0x0)) = (__u8)d; } while(0) -#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)(adr + 0x0))) #endif /* CONFIG_CMD_NAND */