X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2FEVB64260.h;h=c9d8c271ba6a8a1dc452e0d8fed65ca5d139abf5;hb=1a247ba7fa5fb09f56892a09a990f03ce564b3e2;hp=acd8538c319d048f8073fe229f8030977c850a99;hpb=1d0350ed0b1b0f63e3fb5db6b19397b84a2ea1c7;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/EVB64260.h b/include/configs/EVB64260.h
index acd8538..c9d8c27 100644
--- a/include/configs/EVB64260.h
+++ b/include/configs/EVB64260.h
@@ -28,8 +28,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#include <asm/processor.h>
-
 #ifndef __ASSEMBLY__
 #include <galileo/core.h>
 #endif
@@ -44,14 +42,14 @@
 #define CONFIG_EVB64260		1	/* this is an EVB64260 board	*/
 #define CFG_GT_6426x        GT_64260 /* with a 64260 system controller */
 
-#define CONFIG_BAUDRATE		38400 	/* console baudrate = 38400	*/
+#define CONFIG_BAUDRATE		38400	/* console baudrate = 38400	*/
 
 #undef	CONFIG_ECC			/* enable ECC support */
 /* #define CONFIG_EVB64260_750CX  1 */      /* Support the EVB-64260-750CX Board */
 
 /* which initialization functions to call for this board */
 #define CONFIG_MISC_INIT_R	1
-#define CONFIG_BOARD_PRE_INIT	1
+#define CONFIG_BOARD_EARLY_INIT_F 1
 
 #ifndef CONFIG_EVB64260_750CX
 #define CFG_BOARD_NAME		"EVB64260"
@@ -93,7 +91,7 @@
 
 #undef	CONFIG_BOOTARGS
 #define CONFIG_BOOTCOMMAND						     \
-	"bootp && " 						     \
+	"bootp && "						     \
 	"setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath " \
 	"ip=$ipaddr:$serverip:$gatewayip:" \
 	"$netmask:$hostname:eth0:none; && " \
@@ -105,21 +103,30 @@
 #undef	CONFIG_WATCHDOG			/* watchdog disabled		*/
 #undef	CONFIG_ALTIVEC                  /* undef to disable             */
 
-#define CONFIG_BOOTP_MASK	(CONFIG_BOOTP_DEFAULT | \
-				 CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
 
 
-#define CONFIG_COMMANDS	(CONFIG_CMD_DFL | CFG_CMD_ASKENV)
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
 
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
 
 /*
  * Miscellaneous configurable options
  */
 #define	CFG_LONGHELP			/* undef to save memory		*/
 #define	CFG_PROMPT	"=> "		/* Monitor Command Prompt	*/
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define	CFG_CBSIZE	1024		/* Console I/O Buffer Size	*/
 #else
 #define	CFG_CBSIZE	256		/* Console I/O Buffer Size	*/
@@ -198,11 +205,11 @@
 #define CFG_DEV2_PAR		0xc0059bd4
 #define CFG_8BIT_BOOT_PAR	0xc00b5e7c
 #define CFG_32BIT_BOOT_PAR	0xc4a8241c
-        /*   c    4    a      8     2     4    1      c		*/
-        /* 33 22|2222|22 22|111 1|11 11|1 1  |    |		*/
-        /* 10 98|7654|32 10|987 6|54 32|1 098|7 654|3 210	*/
-        /* 11|00|0100|10 10|100|0 00|10 0|100 0|001 1|100	*/
-        /*  3| 0|.... ..| 2| 4 |  0 |  4 |  8  |  3  | 4	*/
+	/*   c    4    a      8     2     4    1      c		*/
+	/* 33 22|2222|22 22|111 1|11 11|1 1  |    |		*/
+	/* 10 98|7654|32 10|987 6|54 32|1 098|7 654|3 210	*/
+	/* 11|00|0100|10 10|100|0 00|10 0|100 0|001 1|100	*/
+	/*  3| 0|.... ..| 2| 4 |  0 |  4 |  8  |  3  | 4	*/
 
 #if 0 /* Wrong?? NTL */
 #define CFG_MPP_CONTROL_0	0x53541717	/* InitAct EOT[4] DBurst TCEn[1] */
@@ -229,11 +236,11 @@
 						/* GPP[27:26] Int[1:0] */
 #else
 # define CFG_MPP_CONTROL_3	0x22090066      /* MREQ MGNT */
-                                                /* GPP[29]    (PCI1Int) */
-                                                /* BClkOut0 */
-                                                /* GPP[27]    (PCI0Int) */
-                                                /* GPP[26]    (RtcInt or PCI1Int) */
-                                                /* CPUInt[25:24] */
+						/* GPP[29]    (PCI1Int) */
+						/* BClkOut0 */
+						/* GPP[27]    (PCI0Int) */
+						/* GPP[26]    (RtcInt or PCI1Int) */
+						/* CPUInt[25:24] */
 #endif
 
 # define CFG_SERIAL_PORT_MUX	0x00000102	/* 0=hiZ  1=MPSC0 2=ETH 0 and 2 RMII */
@@ -242,9 +249,9 @@
 # define CFG_GPP_LEVEL_CONTROL	0x000002c6
 #else
 # define CFG_GPP_LEVEL_CONTROL	0x2c600000	/* 0010 1100 0110 0000 */
-                                                /* gpp[29] */
+						/* gpp[29] */
 						/* gpp[27:26] */
-                                                /* gpp[22:21] */
+						/* gpp[22:21] */
 
 # define CFG_SDRAM_CONFIG	0xd8e18200	/* 0x448 */
 				/* idmas use buffer 1,1
@@ -295,7 +302,6 @@
 #define CFG_PCI1_0_MEM_SPACE	(CFG_PCI1_MEM_BASE)
 
 
-
 /* PCI I/O MAP section */
 #define CFG_PCI0_IO_BASE	0xfa000000
 #define CFG_PCI0_IO_SIZE	_16M
@@ -394,7 +400,7 @@
  * Cache Configuration
  */
 #define CFG_CACHELINE_SIZE	32	/* For all MPC74xx CPUs		 */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CFG_CACHELINE_SHIFT	5	/* log base 2 of the above value */
 #endif
 
@@ -406,10 +412,10 @@
 #define CFG_L2
 
 #ifdef CONFIG_750CX
-#define L2_INIT 0
+#define L2_INIT		0
 #else
-#define L2_INIT  	(L2CR_L2SIZ_2M | L2CR_L2CLK_3 | L2CR_L2RAM_BURST | \
-			L2CR_L2OH_5 | L2CR_L2CTL | L2CR_L2WT)
+#define L2_INIT		(L2CR_L2SIZ_2M | L2CR_L2CLK_3 | L2CR_L2RAM_BURST | \
+			 L2CR_L2OH_5 | L2CR_L2CTL | L2CR_L2WT)
 #endif
 
 #define L2_ENABLE	(L2_INIT | L2CR_L2E)