X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2FCPC45.h;h=c7904a1880b5d23b4617c7fe961c11b6cc1c2142;hb=842033e6964e9e5d34aca893c1845416dd8ac2cc;hp=91d262a22c659c49102c9acd86303d455f6944c2;hpb=50bd0057ba8fceeb48533f8b1a652ccd0e170838;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/CPC45.h b/include/configs/CPC45.h
index 91d262a..c7904a1 100644
--- a/include/configs/CPC45.h
+++ b/include/configs/CPC45.h
@@ -45,10 +45,10 @@
 #define CONFIG_MPC8245		1
 #define CONFIG_CPC45		1
 
+#define CONFIG_SYS_TEXT_BASE	0xFFF00000
 
 #define CONFIG_CONS_INDEX	1
 #define CONFIG_BAUDRATE		9600
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
 
 #define CONFIG_PREBOOT	"echo;echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;echo"
 
@@ -96,9 +96,6 @@
 #if 1
 #define CONFIG_SYS_HUSH_PARSER		1	/* use "hush" command parser	*/
 #endif
-#ifdef	CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
-#endif
 
 /* Print Buffer Size
  */
@@ -126,7 +123,7 @@
 
 #define CONFIG_SYS_EUMB_ADDR		0xFCE00000
 
-#define CONFIG_SYS_MONITOR_BASE	TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
 
 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor	*/
 #define CONFIG_SYS_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()	*/
@@ -150,13 +147,9 @@
  * Definitions for initial stack pointer and data area
  */
 
-/* Size in bytes reserved for initial data
- */
-#define CONFIG_SYS_GBL_DATA_SIZE	128
-
 #define CONFIG_SYS_INIT_RAM_ADDR	0x40000000
-#define CONFIG_SYS_INIT_RAM_END	0x1000
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE	0x1000
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 
 /*
  * NS16550 Configuration
@@ -338,22 +331,11 @@
 #  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value	*/
 #endif
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH	*/
-#define BOOTFLAG_WARM		0x02	/* Software reboot			*/
-
-
-#define SRAM_BASE		0x80000000	/* SRAM base address	*/
-#define SRAM_END		0x801FFFFF
-
 /*----------------------------------------------------------------------*/
 /* CPC45 Memory Map							*/
 /*----------------------------------------------------------------------*/
 #define SRAM_BASE	0x80000000	/* SRAM base address		*/
+#define SRAM_END	0x801FFFFF
 #define ST16552_A_BASE	0x80200000	/* ST16552 channel A		*/
 #define ST16552_B_BASE	0x80400000	/* ST16552 channel A		*/
 #define BCSR_BASE	0x80600000	/* board control / status registers */
@@ -361,6 +343,8 @@
 #define PCMCIA_MEM_BASE 0x83000000	/* PCMCIA memory window base	*/
 #define PCMCIA_IO_BASE	0xFE000000	/* PCMCIA IO window base	*/
 
+#define	CONFIG_SYS_SRAM_BASE	SRAM_BASE
+#define	CONFIG_SYS_SRAM_SIZE	(SRAM_END - SRAM_BASE + 1)
 
 /*---------------------------------------------------------------------*/
 /* CPC45 Control/Status Registers				       */
@@ -466,10 +450,11 @@
  *-----------------------------------------------------------------------
  */
 #define CONFIG_PCI			/* include pci support			*/
+#define CONFIG_PCI_INDIRECT_BRIDGE	/* indirect PCI bridge support */
+#define CONFIG_SYS_EARLY_PCI_INIT
 #undef	CONFIG_PCI_PNP
 #undef	CONFIG_PCI_SCAN_SHOW
 
-#define CONFIG_NET_MULTI		/* Multi ethernet cards support		*/
 
 #define CONFIG_EEPRO100
 #define CONFIG_SYS_RX_ETH_BUFFER	8	/* use 8 rx buffer on eepro100	*/
@@ -496,6 +481,7 @@
  *-----------------------------------------------------------------------
  */
 
+#define CONFIG_IDE_PREINIT	1	/* Use preinit IDE hook */
 #define	CONFIG_IDE_8xx_PCCARD	1	/* Use IDE with PC Card	Adapter	*/
 
 #undef	CONFIG_IDE_8xx_DIRECT		/* Direct IDE    not supported	*/