X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;ds=sidebyside;f=drivers%2Fnet%2Fldpaa_eth%2Flx2160a.c;h=c2641a92d7ec916b4aa76710d5cfb213efeebefb;hb=6cc04547cb3bbd3a3d78947f200acbae19e3c67f;hp=1fbeb0d14b6f429edaa01d77859c7f7eb7659dce;hpb=82fadccccfd80c6162639180af85c600b6e41d9e;p=platform%2Fkernel%2Fu-boot.git

diff --git a/drivers/net/ldpaa_eth/lx2160a.c b/drivers/net/ldpaa_eth/lx2160a.c
index 1fbeb0d..c2641a9 100644
--- a/drivers/net/ldpaa_eth/lx2160a.c
+++ b/drivers/net/ldpaa_eth/lx2160a.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright 2018 NXP
+ * Copyright 2018, 2020 NXP
  */
 #include <common.h>
 #include <phy.h>
@@ -8,6 +8,7 @@
 #include <asm/io.h>
 #include <asm/arch/fsl_serdes.h>
 #include <asm/arch/soc.h>
+#include <linux/mii.h>
 
 u32 dpmac_to_devdisr[] = {
 	[WRIOP1_DPMAC1] = FSL_CHASSIS3_DEVDISR2_DPMAC1,
@@ -32,7 +33,7 @@ u32 dpmac_to_devdisr[] = {
 
 static int is_device_disabled(int dpmac_id)
 {
-	struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
+	struct ccsr_gur __iomem *gur = (void *)CFG_SYS_FSL_GUTS_ADDR;
 	u32 devdisr2 = in_le32(&gur->devdisr2);
 
 	return dpmac_to_devdisr[dpmac_id] & devdisr2;
@@ -40,14 +41,14 @@ static int is_device_disabled(int dpmac_id)
 
 void wriop_dpmac_disable(int dpmac_id)
 {
-	struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
+	struct ccsr_gur __iomem *gur = (void *)CFG_SYS_FSL_GUTS_ADDR;
 
 	setbits_le32(&gur->devdisr2, dpmac_to_devdisr[dpmac_id]);
 }
 
 void wriop_dpmac_enable(int dpmac_id)
 {
-	struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
+	struct ccsr_gur __iomem *gur = (void *)CFG_SYS_FSL_GUTS_ADDR;
 
 	clrbits_le32(&gur->devdisr2, dpmac_to_devdisr[dpmac_id]);
 }
@@ -56,8 +57,8 @@ phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtcl)
 {
 	enum srds_prtcl;
 
-	if (is_device_disabled(dpmac_id + 1))
-		return PHY_INTERFACE_MODE_NONE;
+	if (is_device_disabled(dpmac_id))
+		return PHY_INTERFACE_MODE_NA;
 
 	if (lane_prtcl >= SGMII1 && lane_prtcl <= SGMII18)
 		return PHY_INTERFACE_MODE_SGMII;
@@ -77,13 +78,13 @@ phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtcl)
 	if (lane_prtcl >= _100GE1 && lane_prtcl <= _100GE2)
 		return PHY_INTERFACE_MODE_CAUI4;
 
-	return PHY_INTERFACE_MODE_NONE;
+	return PHY_INTERFACE_MODE_NA;
 }
 
 #ifdef CONFIG_SYS_FSL_HAS_RGMII
 void fsl_rgmii_init(void)
 {
-	struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+	struct ccsr_gur __iomem *gur = (void *)(CFG_SYS_FSL_GUTS_ADDR);
 	u32 ec;
 
 #ifdef CONFIG_SYS_FSL_EC1
@@ -91,7 +92,7 @@ void fsl_rgmii_init(void)
 		& FSL_CHASSIS3_EC1_REGSR_PRTCL_MASK;
 	ec >>= FSL_CHASSIS3_EC1_REGSR_PRTCL_SHIFT;
 
-	if (!ec && (wriop_is_enabled_dpmac(17) == -ENODEV))
+	if (!ec)
 		wriop_init_dpmac_enet_if(17, PHY_INTERFACE_MODE_RGMII_ID);
 #endif
 
@@ -100,7 +101,7 @@ void fsl_rgmii_init(void)
 		& FSL_CHASSIS3_EC2_REGSR_PRTCL_MASK;
 	ec >>= FSL_CHASSIS3_EC2_REGSR_PRTCL_SHIFT;
 
-	if (!ec && (wriop_is_enabled_dpmac(18) == -ENODEV))
+	if (!ec)
 		wriop_init_dpmac_enet_if(18, PHY_INTERFACE_MODE_RGMII_ID);
 #endif
 }