X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;ds=sidebyside;f=arch%2Fx86%2Fcpu%2Fcoreboot%2Fcoreboot.c;h=e24f13afaf1efcb8f7579c3763fce4145958583e;hb=3765b3e7bd0f8e46914d417f29cbcb0c72b1acf7;hp=6e196d786c5afbba4a56376001ceefa425310079;hpb=1350f1cce1859e277ed6766608554bd3914a2413;p=platform%2Fkernel%2Fu-boot.git diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c index 6e196d7..e24f13a 100644 --- a/arch/x86/cpu/coreboot/coreboot.c +++ b/arch/x86/cpu/coreboot/coreboot.c @@ -3,29 +3,14 @@ * (C) Copyright 2008 * Graeme Russ, graeme.russ@gmail.com. * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #include #include #include #include +#include #include #include #include @@ -35,8 +20,6 @@ DECLARE_GLOBAL_DATA_PTR; -unsigned long monitor_flash_len = CONFIG_SYS_MONITOR_LEN; - /* * Miscellaneous platform dependent initializations */ @@ -70,32 +53,31 @@ int board_early_init_r(void) void show_boot_progress(int val) { #if MIN_PORT80_KCLOCKS_DELAY - static uint32_t prev_stamp; - static uint32_t base; - /* * Scale the time counter reading to avoid using 64 bit arithmetics. * Can't use get_timer() here becuase it could be not yet * initialized or even implemented. */ - if (!prev_stamp) { - base = rdtsc() / 1000; - prev_stamp = 0; + if (!gd->arch.tsc_prev) { + gd->arch.tsc_base_kclocks = rdtsc() / 1000; + gd->arch.tsc_prev = 0; } else { uint32_t now; do { - now = rdtsc() / 1000 - base; - } while (now < (prev_stamp + MIN_PORT80_KCLOCKS_DELAY)); - prev_stamp = now; + now = rdtsc() / 1000 - gd->arch.tsc_base_kclocks; + } while (now < (gd->arch.tsc_prev + MIN_PORT80_KCLOCKS_DELAY)); + gd->arch.tsc_prev = now; } #endif outb(val, 0x80); } - int last_stage_init(void) { + if (gd->flags & GD_FLG_COLD_BOOT) + timestamp_add_to_bootstage(); + return 0; } @@ -111,10 +93,6 @@ int board_eth_init(bd_t *bis) return pci_eth_init(bis); } -void setup_pcat_compatibility() -{ -} - #define MTRR_TYPE_WP 5 #define MTRRcap_MSR 0xfe #define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg)) @@ -145,3 +123,12 @@ int board_final_cleanup(void) return 0; } + +void panic_puts(const char *str) +{ + NS16550_t port = (NS16550_t)0x3f8; + + NS16550_init(port, 1); + while (*str) + NS16550_putc(port, *str++); +}