X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;ds=sidebyside;f=arch%2Farm%2Fcpu%2Farm1136%2Fmx31%2Ftimer.c;h=36266da5aa8d68430f9a88313020055cc382d18a;hb=0dc7b82e4ec7cb95738aebd368d06a5cd8e37595;hp=c4bc3b35210fe5d1c1c8d6cc504c936fb225b0d0;hpb=909e9bf3ae6195ac6d52f9e453fba2be8e7e947f;p=platform%2Fkernel%2Fu-boot.git diff --git a/arch/arm/cpu/arm1136/mx31/timer.c b/arch/arm/cpu/arm1136/mx31/timer.c index c4bc3b3..36266da 100644 --- a/arch/arm/cpu/arm1136/mx31/timer.c +++ b/arch/arm/cpu/arm1136/mx31/timer.c @@ -23,6 +23,7 @@ #include #include +#include #include #include #include @@ -43,33 +44,37 @@ DECLARE_GLOBAL_DATA_PTR; -/* "time" is measured in 1 / CONFIG_SYS_HZ seconds, "tick" is internal timer period */ +/* + * "time" is measured in 1 / CONFIG_SYS_HZ seconds, + * "tick" is internal timer period + */ + #ifdef CONFIG_MX31_TIMER_HIGH_PRECISION /* ~0.4% error - measured with stop-watch on 100s boot-delay */ static inline unsigned long long tick_to_time(unsigned long long tick) { tick *= CONFIG_SYS_HZ; - do_div(tick, CONFIG_MX31_CLK32); + do_div(tick, MXC_CLK32); return tick; } static inline unsigned long long time_to_tick(unsigned long long time) { - time *= CONFIG_MX31_CLK32; + time *= MXC_CLK32; do_div(time, CONFIG_SYS_HZ); return time; } static inline unsigned long long us_to_tick(unsigned long long us) { - us = us * CONFIG_MX31_CLK32 + 999999; + us = us * MXC_CLK32 + 999999; do_div(us, 1000000); return us; } #else /* ~2% error */ -#define TICK_PER_TIME ((CONFIG_MX31_CLK32 + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ) -#define US_PER_TICK (1000000 / CONFIG_MX31_CLK32) +#define TICK_PER_TIME ((MXC_CLK32 + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ) +#define US_PER_TICK (1000000 / MXC_CLK32) static inline unsigned long long tick_to_time(unsigned long long tick) { @@ -91,7 +96,7 @@ static inline unsigned long long us_to_tick(unsigned long long us) #endif /* The 32768Hz 32-bit timer overruns in 131072 seconds */ -int timer_init (void) +int timer_init(void) { int i; @@ -106,19 +111,7 @@ int timer_init (void) return 0; } -void reset_timer_masked (void) -{ - /* reset time */ - gd->lastinc = GPTCNT; /* capture current incrementer value time */ - gd->tbl = 0; /* start "advancing" time stamp from 0 */ -} - -void reset_timer(void) -{ - reset_timer_masked(); -} - -unsigned long long get_ticks (void) +unsigned long long get_ticks(void) { ulong now = GPTCNT; /* current tick value */ @@ -131,29 +124,24 @@ unsigned long long get_ticks (void) return gd->tbl; } -ulong get_timer_masked (void) +ulong get_timer_masked(void) { /* * get_ticks() returns a long long (64 bit), it wraps in - * 2^64 / CONFIG_MX31_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~ + * 2^64 / MXC_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~ * 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in * 5 * 10^6 days - long enough. */ return tick_to_time(get_ticks()); } -ulong get_timer (ulong base) +ulong get_timer(ulong base) { - return get_timer_masked () - base; -} - -void set_timer (ulong t) -{ - gd->tbl = time_to_tick(t); + return get_timer_masked() - base; } /* delay x useconds AND preserve advance timestamp value */ -void __udelay (unsigned long usec) +void __udelay(unsigned long usec) { unsigned long long tmp; ulong tmo; @@ -165,7 +153,16 @@ void __udelay (unsigned long usec) /*NOP*/; } -void reset_cpu (ulong addr) +/* + * This function is derived from PowerPC code (timebase clock frequency). + * On ARM it returns the number of timer ticks per second. + */ +ulong get_tbclk(void) +{ + return MXC_CLK32; +} + +void reset_cpu(ulong addr) { struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE; wdog->wcr = WDOG_ENABLE; @@ -190,8 +187,8 @@ void mxc_hw_watchdog_enable(void) #else secs = 64; #endif - writew(readw(&wdog->wcr) | (secs << WDOG_WT_SHIFT) | WDOG_ENABLE, - &wdog->wcr); + setbits_le16(&wdog->wcr, (secs << WDOG_WT_SHIFT) | WDOG_ENABLE + | WDOG_WDZST); }