#include <getopt.h>
#include <fcntl.h>
#include <signal.h>
+#include <errno.h>
+
#include "drmtest.h"
-#include "intel_gpu_tools.h"
+#include "intel_io.h"
#include "intel_bufmgr.h"
#include "intel_batchbuffer.h"
+#include "intel_chipset.h"
#include "igt_debugfs.h"
+#include "ioctl_wrappers.h"
static int drm_fd;
{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { NULL, NULL, NULL }
};
-static igt_debugfs_t dfs;
-
static int readval(FILE *filp)
{
int val;
static void checkit(const int *freqs)
{
- igt_assert(freqs[MIN] <= freqs[MAX]);
- igt_assert(freqs[CUR] <= freqs[MAX]);
- igt_assert(freqs[MIN] <= freqs[CUR]);
- igt_assert(freqs[RPn] <= freqs[MIN]);
- igt_assert(freqs[MAX] <= freqs[RP0]);
- igt_assert(freqs[RP1] <= freqs[RP0]);
- igt_assert(freqs[RPn] <= freqs[RP1]);
+ igt_assert_cmpint(freqs[MIN], <=, freqs[MAX]);
+ igt_assert_cmpint(freqs[CUR], <=, freqs[MAX]);
+ igt_assert_cmpint(freqs[MIN], <=, freqs[CUR]);
+ igt_assert_cmpint(freqs[RPn], <=, freqs[MIN]);
+ igt_assert_cmpint(freqs[MAX], <=, freqs[RP0]);
+ igt_assert_cmpint(freqs[RP1], <=, freqs[RP0]);
+ igt_assert_cmpint(freqs[RPn], <=, freqs[RP1]);
igt_assert(freqs[RP0] != 0);
igt_assert(freqs[RP1] != 0);
}
static void matchit(const int *freqs1, const int *freqs2)
{
- igt_assert(freqs1[CUR] == freqs2[CUR]);
- igt_assert(freqs1[MIN] == freqs2[MIN]);
- igt_assert(freqs1[MAX] == freqs2[MAX]);
- igt_assert(freqs1[RP0] == freqs2[RP0]);
- igt_assert(freqs1[RP1] == freqs2[RP1]);
- igt_assert(freqs1[RPn] == freqs2[RPn]);
+ igt_assert_cmpint(freqs1[CUR], ==, freqs2[CUR]);
+ igt_assert_cmpint(freqs1[MIN], ==, freqs2[MIN]);
+ igt_assert_cmpint(freqs1[MAX], ==, freqs2[MAX]);
+ igt_assert_cmpint(freqs1[RP0], ==, freqs2[RP0]);
+ igt_assert_cmpint(freqs1[RP1], ==, freqs2[RP1]);
+ igt_assert_cmpint(freqs1[RPn], ==, freqs2[RPn]);
}
static void dump(const int *freqs)
#define LOAD_HELPER_BO_SIZE (16*1024*1024)
static void load_helper_set_load(enum load load)
{
- assert(lh.igt_proc.running);
+ igt_assert(lh.igt_proc.running);
if (lh.load == load)
return;
while (!lh.exit) {
if (lh.load == HIGH)
- intel_copy_bo(lh.batch, lh.dst, lh.dst,
+ intel_copy_bo(lh.batch, lh.dst, lh.src,
LOAD_HELPER_BO_SIZE);
emit_store_dword_imm(val);
if (lh.target_buffer)
drm_intel_bo_unreference(lh.target_buffer);
+ if (lh.src)
+ drm_intel_bo_unreference(lh.src);
+ if (lh.dst)
+ drm_intel_bo_unreference(lh.dst);
if (lh.batch)
intel_batchbuffer_free(lh.batch);
drm_intel_bufmgr_destroy(lh.bufmgr);
}
-static void stop_rings(void)
-{
- int fd;
- static const char data[] = "0xf";
-
- fd = igt_debugfs_open(&dfs, "i915_ring_stop", O_WRONLY);
- igt_assert(fd >= 0);
-
- igt_debug("injecting ring stop\n");
- igt_assert(write(fd, data, sizeof(data)) == sizeof(data));
-
- close(fd);
-}
-
-static bool rings_stopped(void)
-{
- int fd;
- static char buf[128];
- unsigned long long val;
-
- fd = igt_debugfs_open(&dfs, "i915_ring_stop", O_RDONLY);
- igt_assert(fd >= 0);
-
- igt_assert(read(fd, buf, sizeof(buf)) > 0);
- close(fd);
-
- sscanf(buf, "%llx", &val);
-
- return (bool)val;
-}
-
static void min_max_config(void (*check)(void))
{
int fmid = (origfreqs[RPn] + origfreqs[RP0]) / 2;
}
#define IDLE_WAIT_TIMESTEP_MSEC 100
-#define IDLE_WAIT_TIMEOUT_MSEC 3000
+#define IDLE_WAIT_TIMEOUT_MSEC 10000
static void idle_check(void)
{
int freqs[NUMFREQ];
wait += IDLE_WAIT_TIMESTEP_MSEC;
} while (wait < IDLE_WAIT_TIMEOUT_MSEC);
- igt_assert(freqs[CUR] == freqs[MIN]);
+ igt_assert_cmpint(freqs[CUR], ==, freqs[MIN]);
igt_debug("Required %d msec to reach cur=min\n", wait);
}
wait += LOADED_WAIT_TIMESTEP_MSEC;
} while (wait < LOADED_WAIT_TIMEOUT_MSEC);
- igt_assert(freqs[CUR] == freqs[MAX]);
+ igt_assert_cmpint(freqs[CUR], ==, freqs[MAX]);
igt_debug("Required %d msec to reach cur=max\n", wait);
}
#define STABILIZE_WAIT_TIMESTEP_MSEC 100
-#define STABILIZE_WAIT_TIMEOUT_MSEC 2000
+#define STABILIZE_WAIT_TIMEOUT_MSEC 10000
static void stabilize_check(int *freqs)
{
int wait = 0;
int pre_freqs[NUMFREQ];
int post_freqs[NUMFREQ];
+ /*
+ * quiescent_gpu upsets the gpu and makes it get pegged to max somehow.
+ * Don't ask.
+ */
+ sleep(10);
+
igt_debug("Apply low load...\n");
load_helper_run(LOW);
stabilize_check(pre_freqs);
igt_debug("Stop rings...\n");
- stop_rings();
- while (rings_stopped())
+ igt_set_stop_rings(STOP_RING_DEFAULTS);
+ while (igt_get_stop_rings())
usleep(1000 * 100);
igt_debug("Ring stop cleared\n");
idle_check();
}
+static void blocking(void)
+{
+ int pre_freqs[NUMFREQ];
+ int post_freqs[NUMFREQ];
+
+ int fd = drm_open_any();
+ igt_assert(fd >= 0);
+
+ /*
+ * quiescent_gpu upsets the gpu and makes it get pegged to max somehow.
+ * Don't ask.
+ */
+ sleep(10);
+
+ igt_debug("Apply low load...\n");
+ load_helper_run(LOW);
+ stabilize_check(pre_freqs);
+ load_helper_stop();
+
+ sleep(5);
+
+ igt_debug("Kick gpu hard ...\n");
+ /* This relies on the blocking waits in quiescent_gpu and the kernel
+ * boost logic to ramp the gpu to full load. */
+ gem_quiescent_gpu(fd);
+ gem_quiescent_gpu(fd);
+
+ igt_debug("Apply low load again...\n");
+ load_helper_run(LOW);
+ stabilize_check(post_freqs);
+ load_helper_stop();
+ matchit(pre_freqs, post_freqs);
+
+ igt_debug("Removing load...\n");
+ idle_check();
+}
+
static void pm_rps_exit_handler(int sig)
{
if (origfreqs[MIN] > readval(stuff[MAX].filp)) {
igt_install_exit_handler(pm_rps_exit_handler);
load_helper_init();
-
- igt_debugfs_init(&dfs);
}
igt_subtest("basic-api")
igt_subtest("reset")
reset();
+
+ igt_subtest("blocking")
+ blocking();
}