#include <stdlib.h>
#include <stdio.h>
#include <string.h>
-#include <assert.h>
#include <fcntl.h>
#include <inttypes.h>
#include <errno.h>
#include <sys/stat.h>
#include <sys/time.h>
-#include <sys/mman.h>
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915_drm.h"
+#include "ioctl_wrappers.h"
#include "drmtest.h"
-#include "intel_gpu_tools.h"
+#include "intel_io.h"
+#include "intel_chipset.h"
#include "i915_reg.h"
#include "i915_3d.h"
return u.dw;
}
-static uint32_t gem_create(int fd, int size)
-{
- struct drm_i915_gem_create create;
-
- create.handle = 0;
- create.size = size;
- (void)drmIoctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create);
- assert(create.handle);
-
- return create.handle;
-}
-
-static void gem_close(int fd, uint32_t handle)
-{
- struct drm_gem_close close;
- int ret;
-
- close.handle = handle;
- ret = drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &close);
- assert(ret == 0);
-}
-
-static uint64_t
-gem_aperture_size(int fd)
-{
- struct drm_i915_gem_get_aperture aperture;
-
- aperture.aper_size = 512*1024*1024;
- (void)drmIoctl(fd, DRM_IOCTL_I915_GEM_GET_APERTURE, &aperture);
- return aperture.aper_size;
-}
-
-static void
-gem_write(int fd, uint32_t handle, int offset, int size, const void *buf)
-{
- struct drm_i915_gem_pwrite pwrite;
- int ret;
-
- pwrite.handle = handle;
- pwrite.offset = offset;
- pwrite.size = size;
- pwrite.data_ptr = (uintptr_t)buf;
- ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_PWRITE, &pwrite);
- assert(ret == 0);
-}
-
static uint32_t fill_reloc(struct drm_i915_gem_relocation_entry *reloc,
uint32_t offset,
uint32_t handle,
static void
render_copy(int fd,
- uint32_t dst, int dst_tiling,
- uint32_t src, int src_tiling)
+ uint32_t dst, int dst_tiling,
+ uint32_t src, int src_tiling,
+ int use_fence)
{
uint32_t batch[1024], *b = batch;
struct drm_i915_gem_relocation_entry reloc[2], *r = reloc;
*b++ = (_3DSTATE_BACKFACE_STENCIL_OPS | BFO_ENABLE_STENCIL_TWO_SIDE | 0);
/* samler state */
- tiling_bits = 0;
- if (src_tiling != I915_TILING_NONE)
- tiling_bits = MS3_TILED_SURFACE;
- if (src_tiling == I915_TILING_Y)
- tiling_bits |= MS3_TILE_WALK;
+ if (use_fence) {
+ tiling_bits = MS3_USE_FENCE_REGS;
+ } else {
+ tiling_bits = 0;
+ if (src_tiling != I915_TILING_NONE)
+ tiling_bits = MS3_TILED_SURFACE;
+ if (src_tiling == I915_TILING_Y)
+ tiling_bits |= MS3_TILE_WALK;
+ }
#define TEX_COUNT 1
*b++ = (_3DSTATE_MAP_STATE | (3 * TEX_COUNT));
*b++ = (0x00000000);
/* render target state */
- tiling_bits = 0;
- if (dst_tiling != I915_TILING_NONE)
- tiling_bits = BUF_3D_TILED_SURFACE;
- if (dst_tiling == I915_TILING_Y)
- tiling_bits |= BUF_3D_TILE_WALK_Y;
+ if (use_fence) {
+ tiling_bits = BUF_3D_USE_FENCE;
+ } else {
+ tiling_bits = 0;
+ if (dst_tiling != I915_TILING_NONE)
+ tiling_bits = BUF_3D_TILED_SURFACE;
+ if (dst_tiling == I915_TILING_Y)
+ tiling_bits |= BUF_3D_TILE_WALK_Y;
+ }
*b++ = (_3DSTATE_BUF_INFO_CMD);
*b++ = (BUF_3D_ID_COLOR_BACK | tiling_bits | WIDTH*4);
*b = fill_reloc(r++, b-batch, dst,
if ((b - batch) & 1)
*b++ = 0;
- assert(b - batch <= 1024);
+ igt_assert(b - batch <= 1024);
handle = gem_create(fd, 4096);
- gem_write(fd, handle, 0, (b-batch)*sizeof(batch[0]), batch);
+ gem_write(fd, handle, 0, batch, (b-batch)*sizeof(batch[0]));
+
+ igt_assert(r-reloc == 2);
- assert(r-reloc == 2);
+ tiling_bits = 0;
+ if (use_fence)
+ tiling_bits = EXEC_OBJECT_NEEDS_FENCE;
obj[0].handle = dst;
obj[0].relocation_count = 0;
obj[0].relocs_ptr = 0;
obj[0].alignment = 0;
obj[0].offset = 0;
- obj[0].flags = 0;
+ obj[0].flags = tiling_bits;
obj[0].rsvd1 = 0;
obj[0].rsvd2 = 0;
obj[1].relocs_ptr = 0;
obj[1].alignment = 0;
obj[1].offset = 0;
- obj[1].flags = 0;
+ obj[1].flags = tiling_bits;
obj[1].rsvd1 = 0;
obj[1].rsvd2 = 0;
exec.num_cliprects = 0;
exec.cliprects_ptr = 0;
exec.flags = 0;
- exec.rsvd1 = exec.rsvd2 = 0;
+ i915_execbuffer2_set_context_id(exec, 0);
+ exec.rsvd2 = 0;
ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec);
while (ret && errno == EBUSY) {
drmCommandNone(fd, DRM_I915_GEM_THROTTLE);
ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec);
}
- assert(ret == 0);
+ igt_assert(ret == 0);
gem_close(fd, handle);
}
*b++ = (XY_SRC_COPY_BLT_CMD |
XY_SRC_COPY_BLT_WRITE_ALPHA |
- XY_SRC_COPY_BLT_WRITE_RGB);
+ XY_SRC_COPY_BLT_WRITE_RGB | 6);
*b++ = 3 << 24 | 0xcc << 16 | WIDTH * 4;
*b++ = 0;
*b++ = HEIGHT << 16 | WIDTH;
if ((b - batch) & 1)
*b++ = 0;
- assert(b - batch <= 1024);
+ igt_assert(b - batch <= 1024);
handle = gem_create(fd, 4096);
- gem_write(fd, handle, 0, (b-batch)*sizeof(batch[0]), batch);
+ gem_write(fd, handle, 0, batch, (b-batch)*sizeof(batch[0]));
- assert(r-reloc == 2);
+ igt_assert(r-reloc == 2);
obj[0].handle = dst;
obj[0].relocation_count = 0;
exec.num_cliprects = 0;
exec.cliprects_ptr = 0;
exec.flags = 0;
- exec.rsvd1 = exec.rsvd2 = 0;
+ i915_execbuffer2_set_context_id(exec, 0);
+ exec.rsvd2 = 0;
ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec);
while (ret && errno == EBUSY) {
drmCommandNone(fd, DRM_I915_GEM_THROTTLE);
ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec);
}
- assert(ret == 0);
+ igt_assert(ret == 0);
gem_close(fd, handle);
}
-static void *gem_mmap(int fd, uint32_t handle, int size, int prot)
-{
- struct drm_i915_gem_mmap_gtt mmap_arg;
- void *ptr;
-
- mmap_arg.handle = handle;
- if (drmIoctl(fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &mmap_arg)) {
- assert(0);
- return NULL;
- }
-
- ptr = mmap(0, size, prot, MAP_SHARED, fd, mmap_arg.offset);
- if (ptr == MAP_FAILED) {
- assert(0);
- ptr = NULL;
- }
-
- return ptr;
-}
-static void gem_set_tiling(int fd, uint32_t handle, int tiling, int stride)
+static void
+copy(int fd,
+ uint32_t dst, int dst_tiling,
+ uint32_t src, int src_tiling)
{
- struct drm_i915_gem_set_tiling set_tiling;
- int ret;
-
- do {
- set_tiling.handle = handle;
- set_tiling.tiling_mode = tiling;
- set_tiling.stride = stride;
-
- ret = ioctl(fd, DRM_IOCTL_I915_GEM_SET_TILING, &set_tiling);
- } while (ret == -1 && (errno == EINTR || errno == EAGAIN));
- assert(ret == 0);
- assert(set_tiling.tiling_mode == tiling);
+retry:
+ switch (random() % 3) {
+ case 0: render_copy(fd, dst, dst_tiling, src, src_tiling, 0); break;
+ case 1: render_copy(fd, dst, dst_tiling, src, src_tiling, 1); break;
+ case 2: if (dst_tiling == I915_TILING_Y || src_tiling == I915_TILING_Y)
+ goto retry;
+ blt_copy(fd, dst, src);
+ break;
+ }
}
static uint32_t
/* Fill the BO with dwords starting at val */
v = gem_mmap(fd, handle, WIDTH*HEIGHT*4, PROT_READ | PROT_WRITE);
+ igt_assert(v);
for (i = 0; i < WIDTH*HEIGHT; i++)
v[i] = val++;
munmap(v, WIDTH*HEIGHT*4);
int i;
v = gem_mmap(fd, handle, WIDTH*HEIGHT*4, PROT_READ);
+ igt_assert(v);
for (i = 0; i < WIDTH*HEIGHT; i++) {
- if (v[i] != val) {
- fprintf(stderr, "Expected 0x%08x, found 0x%08x "
- "at offset 0x%08x\n",
- val, v[i], i * 4);
- abort();
- }
+ igt_assert_f(v[i] == val,
+ "Expected 0x%08x, found 0x%08x "
+ "at offset 0x%08x\n",
+ val, v[i], i * 4);
val++;
}
munmap(v, WIDTH*HEIGHT*4);
uint32_t start = 0;
int i, fd, count;
+ igt_simple_init();
+
fd = drm_open_any();
+ igt_require(IS_GEN3(intel_get_drm_devid(fd)));
+
count = 0;
if (argc > 1)
count = atoi(argv[1]);
if (count == 0)
count = 3 * gem_aperture_size(fd) / (1024*1024) / 2;
- printf("Using %d 1MiB buffers\n", count);
+ igt_info("Using %d 1MiB buffers\n", count);
handle = malloc(sizeof(uint32_t)*count*3);
tiling = handle + count;
start += 1024 * 1024 / 4;
}
- printf("Verifying initialisation..."); fflush(stdout);
+ igt_info("Verifying initialisation..."); fflush(stdout);
for (i = 0; i < count; i++)
check_bo(fd, handle[i], start_val[i]);
- printf("done\n");
+ igt_info("done\n");
- printf("Cyclic blits, forward..."); fflush(stdout);
+ igt_info("Cyclic blits, forward..."); fflush(stdout);
for (i = 0; i < count * 32; i++) {
int src = i % count;
int dst = (i + 1) % count;
- if (random() & 1)
- render_copy(fd, handle[dst], tiling[dst], handle[src], tiling[src]);
- else
- blt_copy(fd, handle[dst], handle[src]);
+ copy(fd, handle[dst], tiling[dst], handle[src], tiling[src]);
start_val[dst] = start_val[src];
}
- printf("verifying..."); fflush(stdout);
+ igt_info("verifying..."); fflush(stdout);
for (i = 0; i < count; i++)
check_bo(fd, handle[i], start_val[i]);
- printf("done\n");
+ igt_info("done\n");
- printf("Cyclic blits, backward..."); fflush(stdout);
+ igt_info("Cyclic blits, backward..."); fflush(stdout);
for (i = 0; i < count * 32; i++) {
int src = (i + 1) % count;
int dst = i % count;
- if (random() & 1)
- render_copy(fd, handle[dst], tiling[dst], handle[src], tiling[src]);
- else
- blt_copy(fd, handle[dst], handle[src]);
+ copy(fd, handle[dst], tiling[dst], handle[src], tiling[src]);
start_val[dst] = start_val[src];
}
- printf("verifying..."); fflush(stdout);
+ igt_info("verifying..."); fflush(stdout);
for (i = 0; i < count; i++)
check_bo(fd, handle[i], start_val[i]);
- printf("done\n");
+ igt_info("done\n");
- printf("Random blits..."); fflush(stdout);
+ igt_info("Random blits..."); fflush(stdout);
for (i = 0; i < count * 32; i++) {
int src = random() % count;
int dst = random() % count;
while (src == dst)
dst = random() % count;
- if (random() & 1)
- render_copy(fd, handle[dst], tiling[dst], handle[src], tiling[src]);
- else
- blt_copy(fd, handle[dst], handle[src]);
+ copy(fd, handle[dst], tiling[dst], handle[src], tiling[src]);
start_val[dst] = start_val[src];
}
- printf("verifying..."); fflush(stdout);
+ igt_info("verifying..."); fflush(stdout);
for (i = 0; i < count; i++)
check_bo(fd, handle[i], start_val[i]);
- printf("done\n");
+ igt_info("done\n");
return 0;
}
projects / platform / upstream / intel-gpu-tools.git / blobdiff